參數(shù)資料
型號(hào): 71M6534-IGTR/F
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP120
封裝: LEAD FREE, LQFP-120
文件頁數(shù): 15/124頁
文件大?。?/td> 2008K
代理商: 71M6534-IGTR/F
FDS_6533_6534_004
71M6533/71M6534 Data Sheet
v1.1
2007-2009 TERIDIAN Semiconductor Corporation
111
5.5.5
SPI Slave Port (MISSION Mode)
Table 85: SPI Slave Port (MISSION Mode) Timing
Parameter
Condition
Min
Typ
Max
Unit
tSPIcyc
PCLK cycle time
1
s
tSPILead Enable lead time
15
ns
tSPILag
Enable lag time
0
ns
tSPIW
PCLK pulse width:
High
Low
40
ns
tSPISCK PCSZ to first PCLK fall
Ignore if PCLK is low
when PCSZ falls.
2
ns
tSPIDIS
Disable time
0
ns
tSPIEV
PCLK to Data Out
15
ns
tSPISU
Data input setup time
10
ns
tSPIH
Data input hold time
5
ns
MSB OUT
LSB OUT
MSB IN
LSB IN
t
SPIcyc
t
SPILead
t
SPILag
t
SPISCK
t
SPIH
t
SPIW
t
SPIEV
t
SPIW
t
SPIDIS
PCSZ
PCLK
PSDI
PSDO
Figure 45: SPI Slave Port (MISSION Mode) Timing
5.5.5.1 Electrical Specification Footnotes
1.
This spec will be guaranteed and verified in production samples, but will not be measured in produc-
tion.
2.
This spec will be guaranteed and verified in production samples, but will be measured in production
only at DC.
3.
This spec will be measured in production at the limits of the specified operating temperature.
4.
This spec defines a nominal relationship rather than a measured parameter. Correct circuit operation
will be verified with other specs that use this nominal relationship as a reference.
相關(guān)PDF資料
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