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參數(shù)資料
| 型號(hào)： | 70V9389L9PRFI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 64K X 18 DUAL-PORT SRAM, 20 ns, PQFP128 |
| 封裝： | TQFP-128 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 211K |
| 代理商： | 70V9389L9PRFI8 |
6.42
2
IDT70V9389/289L
High-Speed 3.3V 64K x18/x16 Dual-Port Synchronous Pipelined Static RAM
Industrial & Commercial Temperature Ranges
1
2
3
4
5
6
7
8
9
10
11
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13
14
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16
17
18
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25
26
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28
29
30
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32
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35
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38
102
101
100
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98
97
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84
83
82
81
80
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72
70
69
68
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65
91
71
NC
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
NC
CNTENR
CLKR
ADSR
VSS
VDD
NC
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
NC
I/O12L
I/O11L
VDD
NC
I/O10L
I/O9L
I/O8L
VDD
I/O7L
I/O6L
I/O5L
I/O4L
VSS
I/O3L
I/O2L
VSS
I/O1L
I/O0L
VDD
VSS
I/O0R
I/O2R
I/O1R
VSS
I/O4R
I/O5R
I/O6R
VDD
I/O7R
I/O8R
I/O9R
I/O10R
NC
VSS
I/O11R
I/O12R
VDD
I/O3R
70V9389PRF
PK-128-1(4)
128-Pin TQFP
Top View(5)
4856 drw 02
A
1
0
R
A
1
R
A
1
2
R
A
1
3
R
A
1
4
R
A
1
5
R
N
C
N
C
L
B
R
U
B
R
C
E
0
R
C
E
1
R
C
N
T
R
S
T
R
V
D
V
S
R
/W
R
O
E
R
F
T
/P
IP
E
R
V
S
I/
O
1
7
R
I/
O
1
6
R
I/
O
1
5
R
I/
O
1
4
R
V
D
V
D
I/
O
1
3
R
A
1
0
L
A
1
L
A
1
2
L
A
1
3
L
A
1
4
L
A
1
5
L
N
C
N
C
L
B
L
U
B
L
C
E
0
L
C
E
1
L
C
N
T
R
S
T
L
V
D
V
S
R
/W
L
O
E
L
F
T
/P
IP
E
L
V
S
I/
O
1
7
L
I/
O
1
6
L
I/
O
1
5
L
I/
O
1
4
L
V
D
V
S
I/
O
1
3
L
3
9
4
0
4
1
4
2
4
3
4
5
4
6
4
7
4
8
4
9
5
0
5
1
5
2
5
3
5
4
5
6
5
7
5
8
5
9
6
0
6
1
6
2
6
3
6
4
1
2
8
1
2
7
1
2
6
1
2
5
1
2
4
1
2
3
1
2
1
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
CNTENL
CLKL
ADSL
03/28/03
Description:
The IDT70V9389/289 is a high-speed 64K x 18 (64K x 16) bit
synchronous Dual-Port RAM. The memory array utilizes Dual-Port
memorycellstoallowsimultaneousaccessofanyaddressfrombothports.
Registersoncontrol,data,andaddressinputsprovideminimalsetupand
hold times. The timing latitude provided by this approach allows systems
to be designed with very short cycle times.
Pin Configuration(1,2,3)
NOTES:
1. All VDD pins must be connected to power supply.
2. All VSS pins must be connected to ground.
3. Package body is approximately 14mm x 20mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
With an input data register, the IDT70V9389/289 has been optimized
forapplicationshavingunidirectionalorbidirectionaldataflowinbursts.An
automatic power down feature, controlled by
CE0and CE1, permits the
on-chip circuitry of each port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 500mW of power.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT70V9289L9PRF8 | 64K X 16 DUAL-PORT SRAM, 20 ns, PQFP128 |
| 710026-3 | 25 mm2, COPPER ALLOY, TIN FINISH, WIRE TERMINAL |
| 710027-5 | 35 mm2, COPPER ALLOY, TIN FINISH, WIRE TERMINAL |
| 710027-2 | 35 mm2, COPPER ALLOY, TIN FINISH, WIRE TERMINAL |
| 710027-1 | 35 mm2, COPPER ALLOY, TIN FINISH, WIRE TERMINAL |
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