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參數(shù)資料
| 型號(hào)： | 7016L20JGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 16K X 9 DUAL-PORT SRAM, 20 ns, PQCC68 |
| 封裝： | 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-68 |
| 文件頁數(shù)： | 20/20頁 |
| 文件大小： | 164K |
| 代理商： | 7016L20JGI |
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
9
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization but not production tested.
3. To access RAM,
CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage
and temperature, the actual tDH will always be smaller than the actual tOW.
5. 'X' in part numbers indicates power rating (S or L).
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(5)
Symbol
Parameter
7016X12
Com'l Only
7016X15
Com'l Only
Unit
Min.
Max.
Min.
Max.
WRITE CYCLE
tWC
Write Cycle Time
12
____
15
____
ns
tEW
Chip Enable to End-of-Write(3)
10
____
12
____
ns
tAW
Address Valid to End-of-Write
10
____
12
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
ns
tWP
Write Pulse Width
10
____
12
____
ns
tWR
Write Recovery Time
2
____
2
____
ns
tDW
Data Valid to End-of-Write
10
____
10
____
ns
tHZ
Output High-Z Time(1,2)
____
10
____
10
ns
tDH
Data Hold Time(4)
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
10
____
10
ns
tOW
Output Active from End-of-Write(1,2,4)
3
____
3
____
ns
tSWRD
SEM Flag Write to Read Time
5
____
5
____
ns
tSPS
SEM Flag Contention Window
5
____
5
____
ns
3190 tbl 13a
Symbol
Parameter
7016X20
Com'l, Ind
& Military
7016X25
Com'l &
Military
7016X35
Com'l &
Military
Unit
Min.
Max.
Min.
Max.
Min.
Max.
WRITE CYCLE
tWC
Write Cycle Time
20
____
25
____
35
____
ns
tEW
Chip Enable to End-of-Write(3)
15
____
20
____
30
____
ns
tAW
Address Valid to End-of-Write
15
____
20
____
30
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
0
____
ns
tWP
Write Pulse Width
15
____
20
____
25
____
ns
tWR
Write Recovery Time
2
____
2
____
2
____
ns
tDW
Data Valid to End-of-Write
15
____
15
____
15
____
ns
tHZ
Output High-Z Time(1,2)
____
12
____
15
____
20
ns
tDH
Data Hold Time(4)
0
____
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
12
____
15
____
20
ns
tOW
Output Active from End-of-Write(1,2,4)
3
____
3
____
3
____
ns
tSWRD
SEM Flag Write to Read Time
5
____
5
____
5
____
ns
tSPS
SEM Flag Contention Window
5
____
5
____
5
____
ns
3190 tbl 13b
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7016L25PFG | 16K X 9 DUAL-PORT SRAM, 25 ns, PQFP80 |
| 7016S35PFGB | 16K X 9 DUAL-PORT SRAM, 35 ns, PQFP80 |
| 70219-920 | 8 CONTACT(S), FEMALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER |
| 70219-921LF | 20 CONTACT(S), FEMALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER |
| 70219-921 | 20 CONTACT(S), FEMALE, RIGHT ANGLE TWO PART BOARD CONNECTOR, SOLDER |
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