參數(shù)資料
型號: 5962-8852511YX
廠商: E2V TECHNOLOGIES PLC
元件分類: PROM
英文描述: 32K X 8 EEPROM 5V, 250 ns, CQCC32
封裝: CERAMIC, LCC-32
文件頁數(shù): 2/27頁
文件大?。?/td> 649K
代理商: 5962-8852511YX
10
0006K–PEEPR–01/08
AT28C256
19. Software Data Protection
Enable Algorithm
Notes:
1. Data Format: I/O7 - I/O0 (Hex);
Address Format: A14 - A0 (Hex).
2. Write Protect state will be activated at end of write
even if no other data is loaded.
3. Write Protect state will be deactivated at end of write
period even if no other data is loaded.
4. 1 to 64 bytes of data are loaded.
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA A0
TO
ADDRESS 5555
LOAD DATA XX
TO
ANY ADDRESS(4)
LOAD LAST BYTE
TO
LAST ADDRESS
ENTER DATA
PROTECT STATE
WRITES ENABLED(2)
20. Software Data Protection
Disable Algorithm
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 80
TO
ADDRESS 5555
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 20
TO
ADDRESS 5555
LOAD DATA XX
TO
ANY ADDRESS(4)
LOAD LAST BYTE
TO
LAST ADDRESS
LOAD DATA 55
TO
ADDRESS 2AAA
EXIT DATA
PROTECT STATE(3)
21. Software Protected Write Cycle Waveforms(1)(2)
Notes:
1. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software
code has been entered.
2. OE must be high only when WE and CE are both low.
相關PDF資料
PDF描述
5962-8852512XX 32K X 8 EEPROM 5V, 200 ns, CDIP28
5962-8852502UX 32K X 8 EEPROM 5V, 300 ns, PGA28
5962-8852505YX 32K X 8 EEPROM 5V, 250 ns, CQCC32
5962-8852512UA 32K X 8 EEPROM 5V, 200 ns, CPGA28
5962-8854503YA 64K X 4 STANDARD SRAM, 55 ns, CDFP28
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