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參數(shù)資料
| 型號： | 5962-8852512XX |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | PROM |
| 英文描述： | 32K X 8 EEPROM 5V, 200 ns, CDIP28 |
| 封裝： | CERAMIC, DIP-28 |
| 文件頁數(shù)： | 1/27頁 |
| 文件大?。?/td> | 649K |
| 代理商： | 5962-8852512XX |
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Features
Fast Read Access Time – 150 ns
Automatic Page Write Operation
– Internal Address and Data Latches for 64 Bytes
– Internal Control Timer
Fast Write Cycle Times
– Page Write Cycle Time: 3 ms or 10 ms Maximum
– 1 to 64-byte Page Write Operation
Low Power Dissipation
– 50 mA Active Current
– 200 A CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
– Endurance: 104 or 105 Cycles
– Data Retention: 10 Years
Single 5V
± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Full Military and Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
1.
Description
The AT28C256 is a high-performance electrically erasable and programmable read-
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access
times to 150 ns with power dissipation of just 440 mW. When the device is deselected,
the CMOS standby current is less than 200 A.
The AT28C256 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA Polling of I/O7. Once the end of a write cycle has been detected a
new access for a read or write can begin.
Atmel’s AT28C256 has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
256K (32K x 8)
Paged Parallel
EEPROM
AT28C256
0006K–PEEPR–01/08
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 5962-8852502UX | 32K X 8 EEPROM 5V, 300 ns, PGA28 |
| 5962-8852505YX | 32K X 8 EEPROM 5V, 250 ns, CQCC32 |
| 5962-8852512UA | 32K X 8 EEPROM 5V, 200 ns, CPGA28 |
| 5962-8854503YA | 64K X 4 STANDARD SRAM, 55 ns, CDFP28 |
| 5962-8855204MA | 32K X 8 STANDARD SRAM, 45 ns, CQCC28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-8852514UA | 制造商:Atmel Corporation 功能描述:EEPROM PARALLEL 256KBIT 32KX8 5V 28PIN PGA - Rail/Tube |
| 5962-8853201XA | 制造商:Fairchild Semiconductor Corporation 功能描述:TDC1049J0V 制造商:QP Semiconductor 功能描述:ADC Single Flash 30Msps 9-bit Parallel 64-Pin CDIP |
| 596288534012A | 制造商:NATIONAL 功能描述:New |
| 5962-8853701GA | 制造商:Linear Technology 功能描述:AMPLIFIER-OP AMP |
| 5962-8853701PA | 制造商:Analog Devices 功能描述: |
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