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參數資料
| 型號： | 5082-7623-BE200 |
| 英文描述： | 7.6 mm (0.3 inch)/10.9 mm (0.43 inch) Seven Segment Displays |
| 中文描述： | 7.6毫米（0.3英寸）/10.9毫米（0.43英寸），七段顯示器 |
| 文件頁數： | 55/134頁 |
| 文件大?。?/td> | 1759K |
| 代理商： | 5082-7623-BE200 |
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TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145K
JULY 2000
REVISED AUGUST 2005
55
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
serial peripheral interface (SPI) module
Some 240xA devices include the four-pin serial peripheral interface (SPI) module. The SPI is a high-speed,
synchronous serial I/O port that allows a serial bit stream of programmed length (one to sixteen bits) to be shifted
into and out of the device at a programmable bit-transfer rate. Normally, the SPI is used for communications
between the DSP controller and external peripherals or another processor. Typical applications include external
I/O or peripheral expansion through devices such as shift registers, display drivers, and ADCs. Multidevice
communications are supported by the master/slave operation of the SPI.
The SPI module features include:
Four external pins:
SPISOMI: SPI slave-output/master-input pin
SPISIMO: SPI slave-input/master-output pin
SPISTE: SPI slave transmit-enable pin
SPICLK: SPI serial-clock pin
NOTE: All four pins can be used as GPIO, if the SPI module is not used.
Two operational modes: master and slave
Baud rate: 125 different programmable rates/10 Mbps at 40-MHz CPUCLK
Data word length: one to sixteen data bits
Four clocking schemes (controlled by clock polarity and clock phase bits) include:
Falling edge without phase delay: SPICLK active high. SPI transmits data on the falling edge of the
SPICLK signal and receives data on the rising edge of the SPICLK signal.
Falling edge with phase delay: SPICLK active high. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the falling edge of the SPICLK signal.
Rising edge without phase delay: SPICLK inactive low. SPI transmits data on the rising edge of the
SPICLK signal and receives data on the falling edge of the SPICLK signal.
Rising edge with phase delay: SPICLK inactive low. SPI transmits data one half-cycle ahead of the
falling edge of the SPICLK signal and receives data on the rising edge of the SPICLK signal.
Simultaneous receive and transmit operation (transmit function can be disabled in software)
Transmitter and receiver operations are accomplished through either interrupt-driven or polled algorithms.
Nine SPI module control registers: Located in control register frame beginning at address 7040h.
NOTE: All registers in this module are 16-bit registers that are connected to the 16-bit peripheral bus. When a register is accessed, the
register data is in the lower byte (7
0), and the upper byte (15
8) is read as zeros. Writing to the upper byte has no effect.
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| 50E-2C-38.0 | TRANS PREBIASED PNP 200MW SOT23 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 5082-7626 | 功能描述:LED 顯示器和配件 Yellow Univ RDP RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數位數量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長:628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 50827650 | 功能描述:LED 顯示器和配件 0.43in Hi Eff Red Ca 7Seg Display RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數位數量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長:628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 5082-7650 | 功能描述:LED 顯示器和配件 Red CA LDP 7 Segment RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數位數量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長:628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 5082-7650 | 制造商:Avago Technologies 功能描述:LED DISPLAY 0.43" HE RED |
| 5082-7650 | 制造商:Avago Technologies 功能描述:LED DISPLAY 0.43" HE RED |
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