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| 型號(hào)： | 5082-7623-BE200 |
| 英文描述： | 7.6 mm (0.3 inch)/10.9 mm (0.43 inch) Seven Segment Displays |
| 中文描述： | 7.6毫米（0.3英寸）/10.9毫米（0.43英寸），七段顯示器 |
| 文件頁(yè)數(shù)： | 41/134頁(yè) |
| 文件大小： | 1759K |
| 代理商： | 5082-7623-BE200 |
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TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145K
JULY 2000
REVISED AUGUST 2005
41
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
central arithmetic logic unit (continued)
The CALU also has an associated carry bit that is set or reset depending on various operations within the device.
The carry bit allows more efficient computation of extended-precision products and additions or subtractions.
It is also useful in overflow management. The carry bit is affected by most arithmetic instructions as well as the
single-bit shift and rotate instructions. It is not affected by loading the accumulator, logical operations, or other
such non-arithmetic or control instructions.
The ADDC (add to accumulator with carry) and SUBB (subtract from accumulator with borrow) instructions use
the previous value of carry in their addition/subtraction operation.
The one exception to the operation of the carry bit is in the use of ADD with a shift count of 16 (add to high
accumulator) and SUB with a shift count of 16 (subtract from high accumulator) instructions. This case of the
ADD instruction can set the carry bit only if a carry is generated, and this case of the SUB instruction can reset
the carry bit only if a borrow is generated; otherwise, neither instruction affects it.
Two conditional operands, C and NC, are provided for branching, calling, returning, and conditionally executing,
based upon the status of the carry bit. The SETC, CLRC, and LST #1 instructions also can be used to load the
carry bit. The carry bit is set to one on a hardware reset.
accumulator
The 32-bit accumulator is the registered output of the CALU. It can be split into two 16-bit segments for storage
in data memory. Shifters at the output of the accumulator provide a left shift of 0 to 7 places. This shift is
performed while the data is being transferred to the data bus for storage. The contents of the accumulator
remain unchanged. When the postscaling shifter is used on the high word of the accumulator (bits 16
31), the
MSBs are lost and the LSBs are filled with bits shifted in from the low word (bits 0
15). When the postscaling
shifter is used on the low word, the LSBs are zero-filled.
The SFL and SFR (in-place one-bit shift to the left/right) instructions and the ROL and ROR (rotate to the
left/right) instructions implement shifting or rotating of the contents of the accumulator through the carry bit. The
SXM bit affects the definition of the SFR (shift accumulator right) instruction. When SXM = 1, SFR performs an
arithmetic right shift, maintaining the sign of the accumulator data. When SXM = 0, SFR performs a logical shift,
shifting out the LSBs and shifting in a zero for the MSB. The SFL (shift accumulator left) instruction is not affected
by the SXM bit and behaves the same in both cases, shifting out the MSB and shifting in a zero. Repeat (RPT)
instructions can be used with the shift and rotate instructions for multiple-bit shifts.
auxiliary registers and auxiliary-register arithmetic unit (ARAU)
The 240xA provides a register file containing eight auxiliary registers (AR0
AR7). The auxiliary registers are
used for indirect addressing of the data memory or for temporary data storage. Indirect auxiliary-register
addressing allows placement of the data memory address of an instruction operand into one of the auxiliary
registers. These registers are referenced with a 3-bit auxiliary register pointer (ARP) that is loaded with a value
from 0 through 7, designating AR0 through AR7, respectively. The auxiliary registers and the ARP can be loaded
from data memory, the ACC, the product register, or by an immediate operand defined in the instruction. The
contents of these registers also can be stored in data memory or used as inputs to the CALU.
The auxiliary register file (AR0
AR7) is connected to the ARAU. The ARAU can autoindex the current auxiliary
register while the data memory location is being addressed. Indexing either by
±
1 or by the contents of the AR0
register can be performed. As a result, accessing tables of information does not require the CALU for address
manipulation; therefore, the CALU is free for other operations in parallel.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMP320LC2401APZS | DSP CONTROLLERS |
| 5082-7661-CG400 | 7.6 mm (0.3 inch)/10.9 mm (0.43 inch) Seven Segment Displays |
| 74ACT823LMQB | 9-Bit D Flip-Flop |
| 50E-2C-38.0 | TRANS PREBIASED PNP 200MW SOT23 |
| 500E-3CL-5.5 | E Rated Medium Voltage Fuses |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5082-7626 | 功能描述:LED 顯示器和配件 Yellow Univ RDP RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數(shù)位數(shù)量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長(zhǎng):628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 50827650 | 功能描述:LED 顯示器和配件 0.43in Hi Eff Red Ca 7Seg Display RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數(shù)位數(shù)量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長(zhǎng):628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 5082-7650 | 功能描述:LED 顯示器和配件 Red CA LDP 7 Segment RoHS:否 制造商:Avago Technologies 顯示器類型:7 Segment 數(shù)位數(shù)量:2 字符大小:7.8 mm x 14.22 mm 照明顏色:Red 波長(zhǎng):628 nm 共用管腳:Common Anode 工作電壓:2.05 V 工作電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 35 C 封裝:Tube |
| 5082-7650 | 制造商:Avago Technologies 功能描述:LED DISPLAY 0.43" HE RED |
| 5082-7650 | 制造商:Avago Technologies 功能描述:LED DISPLAY 0.43" HE RED |
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