參數(shù)資料
型號: 4559
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機的CMOS
文件頁數(shù): 74/148頁
文件大小: 1732K
代理商: 4559
Rev.1.04
Aug 23, 2007
Page 31 of 146
REJ03B0188-0104
4559 Group
The 4559 Group timer consists of the following circuits.
Prescaler : 8-bit programmable timer
Timer 1 : 8-bit programmable timer
Timer 2 : 8-bit programmable timer
Timer 3 : 16-bit fixed frequency timer
Timer LC : 4-bit programmable timer
Watchdog timer: 16-bit fixed frequency timer
(Timers 1, 2 and 3 have the interrupt function, respectively)
Prescaler, timer 1, timer 2, timer 3 and timer LC can be
controlled with the timer control registers PA and W1 to W4. The
watchdog timer is a free counter which is not controlled with the
control register.
Each function is described below.
Table 16 Function related timers
Circuit
Structure
Count source
Frequency
dividing ratio
Use of output signal
Control
register
Prescaler
8-bit programmable
binary down counter
Instruction clock (INSTCK)
1 to 256
Timer 1 count source
Timer 2 count source
Timer 3 count source
PA
Timer 1
8-bit programmable
binary down counter
(link to INT input)
(carrier wave output auto-
control function)
PWM signal (PWMOUT)
Prescaler output (ORCLK)
Timer 3 underflow (T3UDF)
CNTR input
1 to 256
CNTR output control
Timer 1 interrupt
W1
W4
Timer 2
8-bit programmable
binary down counter
(with carrier wave
generation function)
XIN input
Prescaler output divided by 2
(ORCLK/2)
1 to 256
Timer 1 count source
CNTR output
Timer 2 interrupt
W2
W4
Timer 3
16-bit fixed dividing
frequency
XIN input
Prescaler output (ORCLK)
8192
16384
32768
65536
Timer 1 count source
Timer LC count source
Timer 3 interrupt
W3
Timer LC
4-bit programmable binary
down counter
Bit 4 of timer 3 (T34)
System clock (STCK)
1 to 16
LCD clock
W4
Watchdog
timer
16-bit fixed dividing
frequency
Instruction clock (INSTCK)
65536
System reset (counting twice)
Decision of flag WDF1
-
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