參數(shù)資料
型號： 4559
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機(jī)的CMOS
文件頁數(shù)： 52/148頁
文件大?。?/td> 1732K
代理商： 4559
Rev.1.04
Aug 23, 2007
Page 145 of 146
REJ03B0188-0104
4559 Group
Voltage drop detection circuit characteristics
Note 1. The detection voltage (VRST
) is defined as the voltage when reset occurs when the supply voltage (VDD) is falling.
Note 2. The detection voltage (VRST+) is defined as the voltage when reset is released when the supply voltage (VDD) is rising from reset
occurs.
Note 3. When the supply voltage goes lower than the detection voltage (VSKIP), the voltage drop detection circuit interrupt request flag
(VDF) is set to “1“.
Note 4. Voltage drop detection circuit operation current (IRST) is added to IDD (power current) when voltage drop detection circuit is used.
Note 5. The detection time (TRST) is defined as the time until reset occurs when the supply voltage (VDD) is falling to [VRST-
0.1V].
Basic timing diagram
Table 35 Voltage drop detection circuit characteristics (Ta = –20
°C to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Unit
Min.
Typ.
Max.
VRST-
Detection voltage
(reset occurs) (Note 1)
Ta = 25
°C1.7
V
20°C≤ Ta < 0°C1.6
2.2
0
°C≤ Ta < 50°C1.3
2.1
50
°C≤ Ta ≤ 85°C1.1
1.8
VRST+
Detection voltage
(reset release) (Note 2)
Ta = 25
°C1.8
V
20°C≤ Ta < 0°C1.7
2.3
0
°C≤ Ta < 50°C1.4
2.2
50
°C≤ Ta ≤ 85°C1.2
1.9
VSKIP
Detection voltage
(skip occurs) (Note 3)
Ta = 25
°C2
V
20°C≤ Ta < 0°C1.9
2.5
0
°C≤ Ta < 50°C1.6
2.4
50
°C≤ Ta ≤ 85°C1.4
2.1
VRST+
VRST-
Detection voltage hysteresis
0.1
V
IRST
Operation current (Note 4)
VDD = 5V
30
60
A
VDD = 3V
15
30
VDD = 1.8V
6
12
TRST
Detection time (Note 5)
VDD → (VRST-
0.1V)
0.2
1.2
ms
System clock
STCK
Port output
D0 to D7
P00 to P03
P10 to P13
P20 to P23
P30 to P33, C
Port input
D0 to D5
P00 to P03
P10 to P13
P20 to P23
P30 to P33
Interrupt input
INT
Parameter
Pin name
Machine cycle
Mi
Mi + 1
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