參數(shù)資料
型號(hào): 2SJ575
元件分類: 小信號(hào)晶體管
英文描述: SMALL SIGNAL, FET
封裝: MPAK-3
文件頁數(shù): 2/8頁
文件大?。?/td> 39K
代理商: 2SJ575
2SJ575
2
Absolute Maximum Ratings (Ta = 25°C)
Item
Symbol
Ratings
Unit
Drain to source voltage
V
DSS
-30
V
Gate to source voltage
V
GSS
±20
V
Drain current
I
D
-100
mA
Drain peak current
I
D(pulse)
Note1
-400
mA
Body-drain diode reverse drain current
I
DR
-100
mA
Channel dissipation
Pch
Note 2
400
mW
Channel temperature
Tch
150
°C
Storage temperature
Tstg
–55 to +150
°C
Note:
1. PW 10 s, duty cycle 1%
2. Value on the alumina ceramic board (12.5x20x0.7mm)
Electrical Characteristics (Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown
voltage
V
(BR)DSS
-30
V
I
D = -100 A, VGS = 0
Gate to source breakdown
voltage
V
(BR)GSS
±20
V
I
G = ±100 A, VDS = 0
Gate to source leak current
I
GSS
——±5
A
V
GS = ±16 V, VDS = 0
Zero gate voltege drain
current
I
DSS
——-1A
V
DS = -30 V, VGS = 0
Gate to source cutoff voltage
V
GS(off)
-1.3
-2.3
V
I
D = -10A, VDS = -5 V
Static drain to source on state R
DS(on)
2.8
3.3
I
D = -50 mA,VGS = -10 V
Note 3
resistance
R
DS(on)
5.7
7.9
I
D = -50 mA,VGS = -4 V
Note 3
Forward transfer admittance
|y
fs|
68
105
mS
I
D = -50 mA, VDS = -10 V
Note 3
Input capacitance
Ciss
25
pF
V
DS = -10 V
Output capacitance
Coss
20
pF
V
GS = 0
Reverse transfer capacitance Crss
8
pF
f = 1 MHz
Turn-on delay time
t
d(on)
10—ns
I
D = -50mA, VGS = -10 V
Rise time
t
r
15—ns
R
L = 200
Turn-off delay time
t
d(off)
40—ns
Fall time
t
f
45—ns
Note:
3. Pulse test
4. Marking is AP
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