28F800C2, 28F160C2
E
6
PRELIMINARY
1.2
Product Overview
Intel provides secure low voltage memory solutions
with the Advanced Boot Block family of products. A
new
block
locking
feature
locking/unlocking of any block with zero-latency. A
128-bit protection register allows unique flash
device identification.
allows
instant
Discrete supply pins provide single voltage read,
program, and erase capability at 2.4 V while also
allowing
12 V
V
PP
programming. Improved 12 V, a new feature
designed to reduce external logic, simplifies board
designs
when
combining
programming with 2.4 V in-field programming.
for
faster
production
12 V
production
The 2.4 Volt Advanced+ Boot Block flash memory
products are available in x16 packages in the
following densities: (see Section 6, Ordering
Information)
8-Mbit (8,388,608 bit) flash memories organized
as either 512 Kwords of 16 bits each.
16-Mbit
(16,777,216
organized as either 1024 Kwords of 16 bits
each.
bit)
flash
memories
Eight 4-Kword parameter blocks are located at
either the top (denoted by -T suffix) or the bottom (-
B suffix) of the address map in order to
accommodate different microprocessor protocols
for kernel code location. The remaining memory is
grouped into 64-Kbyte main blocks. (See Appendix
E.)
All blocks can be locked or unlocked instantly to
provide complete protection for code or data. (see
Section 3.3 for details).
The Command User Interface (CUI) serves as the
interface
between
the
microcontroller and the internal operation of the
flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and
timings
necessary
for
operations,
including
unburdening the microprocessor or microcontroller.
microprocessor
or
program
verification,
and
erase
thereby
The status register indicates the status of the WSM
by signifying block erase or word program
completion and status.
Program and erase automation allows program and
erase operations to be executed using an industry-
standard two-write command sequence to the CUI.
Program operations are performed in word or byte
increments. Erase operations erase all locations
within a block simultaneously. Both program and
erase operations can be suspended by the system
software in order to read from any other block. In
addition, data can be programmed to another block
during an erase suspend.
The 2.4 Volt Advanced+ Boot Block flash memories
offer two low power savings features: Automatic
Power Savings (APS) and standby mode. The
device automatically enters APS mode following the
completion of a read cycle. Standby mode is
initiated when the system deselects the device by
driving CE# inactive. Combined, these two power
savings
features
significantly
consumption.
reduce
power
The device can be reset by lowering RP# to GND.
This provides CPU-memory reset synchronization
and additional protection against bus noise that
may occur during system reset and power-up/down
sequences (see Section 3.5 and 3.6).
Refer to the DC Characteristics Section 4.3 for
complete current and voltage specifications. Refer
to the AC Characteristics Sections 4.4 and 4.5, for
read and write performance specifications. Program
and erase times and shown in Section 4.6.
2.0
PRODUCT DESCRIPTION
This section provides device pin descriptions and
package pinouts for the 2.4 Volt Advanced+ Boot
Block flash memory family which is available in 48-
lead TSOP (x16), and 48-ball
μ
BGA packages
(Figures 1 and 2, respectively).
2.1
Package Pinouts