參數(shù)資料
型號(hào)： 28F320J5
廠商： Intel Corp.
英文描述： 5 Volt Intel StrataFlash Memory(5 V 32M位英特爾StrataFlash存儲(chǔ)器)
中文描述： 5伏英特爾StrataFlash存儲(chǔ)器（5伏32兆位英特爾的StrataFlash存儲(chǔ)器）
文件頁(yè)數(shù)： 40/53頁(yè)
文件大?。?/td> 272K
代理商： 28F320J5
28F320J5/28F640J5
E
40
PRELIMINARY
5.0 DESIGN CONSIDERATIONS
5.1
Three-Line Output Control
The device will often be used in large memory
arrays. Intel provides five control inputs (CE
0
, CE
1
,
CE
2
, OE#, and RP#) to accommodate multiple
memory connections. This control provides for:
a.
b.
Lowest possible memory power dissipation.
Complete
assurance
contention will not occur.
that
data
bus
To use these control inputs efficiently, an address
decoder should enable the device (see Table 2,
Chip Enable Truth Table) while OE# should be
connected to all memory devices and the system’s
READ# control line. This assures that only selected
memory devices have active outputs while de-
selected memory devices are in standby mode.
RP# should be connected to
POWERGOOD signal to prevent unintended writes
during system power transitions. POWERGOOD
should also toggle during system reset.
the
system
5.2
STS and Block Erase, Program,
and Lock-Bit Configuration
Polling
STS is an open drain output that should be
connected to V
CCQ
by a pull-up resistor to provide a
hardware method of detecting block erase,
program, and lock-bit configuration completion. In
default mode, it transitions low after block erase,
program, or lock-bit configuration commands and
returns to High Z when the WSM has finished
executing the internal algorithm. For alternate
configurations of the STS pin, see the Configuration
command.
STS can be connected to an interrupt input of the
system CPU or controller. It is active at all times.
STS, in default mode, is also High Z when the
device is in block erase suspend (with programming
inactive) or in reset/power-down mode.
5.3
Power Supply Decoupling
Flash memory power switching characteristics
require
careful
device
designers are interested in three supply current
issues; standby current levels, active current levels
and transient peaks produced by falling and rising
edges of CE
0
, CE
1
, CE
2
, and OE#. Transient
current magnitudes depend on the device outputs’
capacitive and inductive loading. Two-line control
and proper decoupling capacitor selection will
suppress transient voltage peaks. Since Intel
StrataFlash memory devices draw their power from
three V
CC
pins (these devices do not include a V
PP
pin), it is recommended that systems without
separate power and ground planes attach a 0.1 μF
ceramic capacitor between each of the device’s
three V
CC
pins (this includes V
CCQ
) and ground.
These high-frequency, low-inductance capacitors
should be placed as close as possible to package
leads on each Intel StrataFlash memory device.
Each device should have a 0.1 μF ceramic
capacitor connected between its V
CC
and GND.
These high-frequency, low inductance capacitors
should be placed as close as possible to package
leads. Additionally, for every eight devices, a 4.7 μF
electrolytic capacitor should be placed between V
CC
and GND at the array’s power supply connection.
The bulk capacitor will overcome voltage slumps
caused by PC board trace inductance.
decoupling.
System
5.4
Input Signal Transitions
–
Reducing Overshoots and
Undershoots When Using
Buffers/Transceivers
As faster, high-drive devices such as transceivers
or buffers drive input signals to flash memory
devices,
overshoots
and
sometimes cause input signals to exceed flash
memory specifications (see Section 6.1, Absolute
Maximum
Ratings).
Many
vendors now carry bus-interface devices with
internal output-damping resistors or reduced-drive
outputs. Internal output-damping resistors diminish
the nominal output drive currents, while still leaving
sufficient drive capability for most applications.
These
internal
undershoots
can
buffer/transceiver
output-
相關(guān)PDF資料
PDF描述
28F640J5 5 V Intel StrataFlash Memory(5V 64M位英特爾StrataFlash閃速存儲(chǔ)器)
28F400B3 SMART 3 ADVANCED BOOT BLOCK WORD-WIDE
28F400BL-TB 4-MBlT (256K x 16, 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY
28F400BV-TB 4-MBIT (256K X 16, 512K X 8)SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
28F400BX-TB 4-MBIT (256K X 16, 512K X 8) BOOT BLOCK FLASH MEMORY FAMILY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F320J5_02 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory
28F320S3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
28F320S5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
28F320W30 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
28F400B3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 3 ADVANCED BOOT BLOCK WORD-WIDE
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