參數(shù)資料
型號(hào): 28F320J5
廠商: Intel Corp.
英文描述: 5 Volt Intel StrataFlash Memory(5 V 32M位英特爾StrataFlash存儲(chǔ)器)
中文描述: 5伏英特爾StrataFlash存儲(chǔ)器(5伏32兆位英特爾的StrataFlash存儲(chǔ)器)
文件頁數(shù): 23/53頁
文件大小: 272K
代理商: 28F320J5
E
4.2.5
28F320J5/28F640J5
23
PRELIMINARY
SYSTEM INTERFACE INFORMATION
The following device information can optimize system interface software.
Table 10. System Interface Information
Offset
Length
Description
Add.
Hex
Code
Value
1Bh
1
V
CC
logic supply minimum program/erase voltage
bits 0
–3 BCD 100 mV
bits 4–7 BCD volts
1B:
--45
4.5 V
1Ch
1
V
CC
logic supply maximum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 BCD volts
1C:
--55
5.5 V
1Dh
1
V
PP
[programming] supply minimum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
1D:
--00
0.0 V
1Eh
1
V
PP
[programming] supply maximum program/erase voltage
bits 0–3 BCD 100 mV
bits 4–7 HEX volts
1E:
--00
0.0 V
1Fh
1
“n” such that typical single word program time-out = 2
n
μs
1F:
--07
128 μs
20h
1
“n” such that typical max. buffer write time-out = 2
n
μs
20:
--07
128 μs
21h
1
“n” such that typical block erase time-out = 2
n
ms
21:
--0A
1 s
22h
1
“n” such that typical full chip erase time-out = 2
n
ms
22:
--00
NA
23h
1
“n” such that maximum word program time-out = 2
n
times
typical
23:
--04
192 μs
24h
1
“n” such that maximum buffer write time-out = 2
n
times typical
24:
--04
192 μs
25h
1
“n” such that maximum block erase time-out = 2
n
times typical
25:
--04
16 s
26h
1
“n” such that maximum chip erase time-out = 2
n
times typical
26:
--00
NA
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