9
Am79C930 Operational Modes
The Am79C930 device offers a very flexible MAC/
PHY interface, just as the HARRIS PRISM chip
chipset does. There are mode options for many of the
functions of the Am79C930 device. The following sec-
tions describe the mode options that must be invoked
in order for the Am79C930 device to interoperate with
the HARRIS PRISM chipset.
The operational modes of the Am79C930 device are set
by modifying control bits in the device’s register sets, in-
cluding bits contained in the MIR, TIR, and TCR register
sets. MIR registers are only visible to the 80188 embed-
ded core; TIR and TCR registers are accessible by both
the 80188 core and the host system. However, since the
MAC firmware must use TIR and TCR registers in order
to perform the required MAC protocol operations, and
since it is most convenient and straightforward to keep
all TIR and TCR operations within a single piece of code
(i.e., the MAC firmware), it is recommended that only the
MAC firmware (
not
the driver software) modify TIR and
TCR settings to accommodate the needs of a particular
PHY implementation.
An API has been defined and is described in another
section of this application note, which allows the user to
create the appropriate calls required in order to allow
the MAC firmware to set up the proper configuration for
any particular Am79C930 application. Other API calls
are needed in order to translate low-level radio instruc-
tions into the particular signalling that is required for the
HARRIS PRISM chipset. A complete description of API
functionality can be found in a later section.
The remainder of this section describes the bit loca-
tions that modify the operational modes of the
Am79C930 device and describes the mode affected by
each bit. The material contained within this section is
intended to serve as a guide in generating the proper
code for each of the API calls that must be written in
order to allow the Am79C930 device and its MAC firm-
ware to communicate with the HARRIS PRISM chipset.
In particular, the API calls that will be affected by the
descriptions in this section are those calls that initialize
the configuration of the Am79C930 device and those
that initialize the configuration of the HARRIS PRISM
chipset.
A summarized version of the register bit locations and
the required register settings for this application are
given in Table 2.