22
8-25.
Timing of Pulse Width Measurement Operation by
Means of Restart (with Rising Edge Specified) ..................................................................
Control Register Settings in External Event Counter Mode ...............................................
External Event Counter Configuration Diagram .................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ..........................
Control Register Settings in Square-Wave Output Mode ...................................................
Square-Wave Output Operation Timing .............................................................................
Control Register Settings for One-Shot Pulse Output Operation Using Software Trigger..
One-Shot Pulse Output Operation Timing Using Software Trigger ....................................
Control Register Settings for One-Shot Pulse Output Operation Using External Trigger...
One-Shot Pulse Output Operation Timing Using
External Trigger (with Rising Edge Specified) ....................................................................
16-bit Timer Register Start Timing ......................................................................................
Timings After Change of Compare Register During Timer Count Operation ......................
Capture Register Data Retention Timing............................................................................
Operation Timing of OVF0 Flag..........................................................................................
195
196
197
197
198
199
200
201
202
8-26.
8-27.
8-28.
8-29.
8-30.
8-31.
8-32.
8-33.
8-34.
203
204
204
205
206
8-35.
8-36.
8-37.
8-38.
9-1.
9-2.
9-3.
9-4.
9-5.
9-6.
9-7.
9-8.
9-9.
9-10.
9-11.
9-12.
9-13.
9-14.
9-15.
9-16.
8-bit Timer/Event Counter Block Diagram ..........................................................................
Block Diagram of 8-bit Timer/Event Counter Output Control Circuit 1 ...............................
Block Diagram of 8-bit Timer/Event Counter Output Control Circuit 2 ...............................
Timer Clock Select Register 1 Format................................................................................
8-bit Timer Mode Control Register 1 Format ......................................................................
8-bit Timer Output Control Register Format .......................................................................
Port Mode Register 3 Format .............................................................................................
Interval Timer Operation Timings .......................................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ..........................
Square Wave Output Operation Timing..............................................................................
Interval Timer Operation Timing .........................................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ..........................
Square Wave Output Operation Timing..............................................................................
8-bit Timer Registers 1 and 2 Start Timing .........................................................................
External Event Counter Operation Timing ..........................................................................
Timing After Compare Register Change During Timer Count Operation............................
213
214
214
217
218
219
220
221
224
226
227
229
231
232
232
233
10-1.
10-2.
10-3.
Watch Timer Block Diagram ...............................................................................................
Timer Clock Select Register 2 Format................................................................................
Watch Timer Mode Control Register Format ......................................................................
237
238
239
11-1.
11-2.
11-3.
Watchdog Timer Block Diagram .........................................................................................
Timer Clock Select Register 2 Format................................................................................
Watchdog Timer Mode Register Format.............................................................................
243
245
246
12-1.
12-2.
Remote Controlled Output Application Example ................................................................
Clock Output Control Circuit Block Diagram.......................................................................
249
250
LIST OF FIGURES (3/8)
Figure No.
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