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21
LIST OF TABLES (1/2)
Table No.
Title
Page
1-1
V850/SB1 ...............................................................................................................................................
23
3-1
3-2
3-3
Program Registers..................................................................................................................................
System Register Numbers......................................................................................................................
Interrupt/Exception Table .......................................................................................................................
59
60
68
4-1
Bus Priority.............................................................................................................................................
105
5-1
5-2
Interrupt Source List...............................................................................................................................
Description of Key Return Detection Pin................................................................................................
108
138
6-1
6-2
6-3
Operating Statuses in HALT Mode.........................................................................................................
Operating Statuses in IDLE Mode..........................................................................................................
Operating States in Software STOP Mode.............................................................................................
145
147
149
7-1
7-2
7-3
7-4
Configuration of Timers 0 and 1.............................................................................................................
Valid Edge of TIn0 Pin and Capture Trigger of CRn0 ............................................................................
Valid Edge of TIn1 Pin and Capture Trigger of CRn0 ............................................................................
Timers 2 to 7 Configuration....................................................................................................................
155
156
156
188
8-1
8-2
8-3
Interval Time of Interval Timer................................................................................................................
Configuration of Watch Timer.................................................................................................................
Interval Time of Interval Timer................................................................................................................
206
206
210
9-1
9-2
9-3
9-4
9-5
Runaway Detection Time by Watchdog Timer .......................................................................................
Interval Time of Interval Timer...............................................................................................................
Watchdog Timer Configuration...............................................................................................................
Runaway Detection Time of Watchdog Timer........................................................................................
Interval Time of Interval Timer................................................................................................................
212
212
213
216
217
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
Configuration of CSIn.............................................................................................................................
Configuration of I
INTIICn Timing and Wait Control............................................................................................................
Extension Code Bit Definitions...............................................................................................................
Status During Arbitration and Interrupt Request Generation Timing......................................................
Wait Periods...........................................................................................................................................
Configuration of UARTn .........................................................................................................................
Relationship Between Main Clock and Baud Rate.................................................................................
Receive Error Causes ............................................................................................................................
Configuration of CSI4.............................................................................................................................
220
230
270
271
273
275
289
302
308
310
2
Cn...............................................................................................................................