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4.5.3
Relationship between programmable wait and external wait.........................................................94
4.6 Idle State Insertion Function...................................................................................................... 95
4.7 Bus Hold Function ...................................................................................................................... 96
4.7.1
Outline of function..........................................................................................................................96
4.7.2
Bus hold procedure........................................................................................................................97
4.7.3
Operation in power save mode......................................................................................................97
4.8 Bus Timing................................................................................................................................... 98
4.9 Bus Priority................................................................................................................................ 105
4.10 Memory Boundary Operation Condition............................................................................... 105
4.10.1 Program space ............................................................................................................................105
4.10.2 Data space...................................................................................................................................105
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION.................................................. 107
5.1 Outline........................................................................................................................................ 107
5.1.1
Features.......................................................................................................................................107
5.2 Non-Maskable Interrupt ............................................................................................................ 110
5.2.1
Operation.....................................................................................................................................111
5.2.2
Restore ........................................................................................................................................113
5.2.3
NP flag.........................................................................................................................................114
5.2.4
Noise elimination circuit of NMI pin..............................................................................................114
5.2.5
Edge detection function of NMI pin..............................................................................................115
5.3 Maskable Interrupts................................................................................................................... 116
5.3.1
Operation.....................................................................................................................................116
5.3.2
Restore ........................................................................................................................................118
5.3.3
Priorities of maskable interrupts ..................................................................................................119
5.3.4
Interrupt control register (xxICn)..................................................................................................123
5.3.5
In-service priority register (ISPR).................................................................................................125
5.3.6
Maskable interrupt status flag......................................................................................................125
5.3.7
Watchdog timer mode register (WDTM) ......................................................................................126
5.3.8
Noise elimination .........................................................................................................................126
5.3.9
Edge detection function...............................................................................................................128
5.4 Software Exception................................................................................................................... 129
5.4.1
Operation.....................................................................................................................................129
5.4.2
Restore ........................................................................................................................................130
5.4.3
EP flag .........................................................................................................................................131
5.5 Exception Trap........................................................................................................................... 131
5.5.1
Illegal op code definition..............................................................................................................131
5.5.2
Operation.....................................................................................................................................131
5.5.3
Restore ........................................................................................................................................132
5.6 Priority Control.......................................................................................................................... 134
5.6.1
Priorities of interrupts and exceptions..........................................................................................134
5.6.2
Multiple interrupt processing........................................................................................................134
5.7 Interrupt Latency Time.............................................................................................................. 137
5.8 Periods Where Interrupt Is Not Acknowledged...................................................................... 137
5.9 Key Interrupt Function.............................................................................................................. 138