參數(shù)資料
型號(hào): ZPSD813F1V
英文描述: Flash In System Programmable Mirocomputer Peripherals(閃速,在系統(tǒng)可編程微控制器外圍器件,1M位閃速存儲(chǔ)器,256K位EEPROM,16K位SRAM)
中文描述: Flash在系統(tǒng)可編程Mirocomputer外設(shè)(閃速,在系統(tǒng)可編程微控制器外圍器件,100萬位閃速存儲(chǔ)器,256K位的EEPROM,16K的位的SRAM)
文件頁(yè)數(shù): 11/130頁(yè)
文件大小: 650K
代理商: ZPSD813F1V
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Prelimnary
PSD813F Famly
7
PSD813F
Architectural
Overview
(cont.)
5.4 I/OPorts
The PSD813F has 27 I/O pins divided among four ports (Port A, B, C, and D). Each I/O pin
can be individually configured for different functions. Ports A, B, C and D can be configured
as standard MCU I/O ports, PLD I/O, or latched address outputs for microcontrollers using
multiplexed address/data busses.
The JTAG pins can be enabled on Port C for In-System Programming (ISP).
Ports A and B can also be configured as a data port for a non-multiplexed bus or
multiplexed Address/Data buses for certain types of 16-bit microcontrollers.
5.5 Microcontroller Bus Interface
The PSD813F easily interfaces with most 8-bit microcontrollers that have either
multiplexed or non-multiplexed address/data busses. The device is configured to respond to
the microcontroller’s control signals, which are also used as inputs to the PLDs. Where
there is a requirement to use a 16-bit data bus to interface to a 16-bit microcontroller, two
PSDs must be used. Section 9.3.5 contains microcontroller interface examples.
5.6 JTAGPort
In-System Programming can be performed through the JTAG pins on Port C. This serial
interface allows complete programming of the entire PSD813F device. A blank device can
be completely programmed. The JTAG signals (TMS, TCK, TSTAT, TERR, TDI, TDO) can
be multiplexed with other functions on Port C. Table 3 indicates the JTAG signals pin
assignments.
Port C Pins
JTAGSignal
PC0
PC1
PC3
PC4
PC5
PC6
TMS
TCK
TSTAT
TERR
TDI
TDO
Table 3. JTAGSignals on Port C
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ZPSD813F1V-20J 制造商:WSI 功能描述:
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ZPSD813F2-12UI 制造商:WSI 功能描述: 制造商:WSI 功能描述:1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64