參數(shù)資料
型號: ZPSD502B1-12LI
英文描述: Field-Programmable Peripheral
中文描述: 現(xiàn)場可編程外圍
文件頁數(shù): 129/153頁
文件大小: 1036K
代理商: ZPSD502B1-12LI
PSD5XX Famly
126
-20
-25
ZPLD_TURBO
OFF
*
Symbol
Parameter
Conditions
Min
Max
Min
Max
Unit
t
LVDV
ALE Access Time from
Power Down
170
250
Add 20
ns
t
LVDV1
ALE or CSI Access Time
from Sleep
200
250
0
ns
t
LVDV2
ZPLD Propagation Delay
in Sleep Mode
600
900
0
ns
t
LVDV3
ZPLD Recovery Time after
Sleep Mode
250
400
0
ns
t
CHCL
APD Clock High Time
Using PE7
16
27
0
ns
t
CLCH
APD Clock Low Time
Using PE7
16
27
0
ns
f
MAX
APD Maximum Frequency
Using PE7
20.00
18.52
0
MHz
t
1
RESET Active Low Time
300
400
0
ns
t
2
RESET High to Operational Device
300
400
0
ns
Power Down and Reset Timng
(3.0 V ± 10%)
Microcontroller Interface – AC/DC Parameters
(ZPSD5XXV Versions)
*
NOTE:
If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 20 ns to the timing parameters.
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