參數(shù)資料
型號(hào)： ZL50022QCC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Enhanced 4 K Digital Switch with Stratum 4E DPLL
中文描述： TELECOM, DIGITAL TIME SWITCH, PQFP256
封裝： 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256
文件頁(yè)數(shù)： 67/121頁(yè)
文件大?。?/td> 939K
代理商： ZL50022QCC
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ZL50022
Data Sheet
67
Zarlink Semiconductor Inc.
Bit
Name
Description
15
Unused
Reserved.
In normal functional mode, this bit is zero.
14 - 0
FOF14 - 0
Frequency Offset Bits:
The binary value of these bits represents the current deviation
of the DPLL output from its center frequency. Defined in same units as CFN in the 2's
complement format.
Note 1:
Output frequency offset, relative to master clock, will be represented as the following:
+10 ppm: CFN x 0.00001 = 440 = 01B8
-10 ppm: CFN x (-0.00001) = -440 = 7E48
H
Table 32 - Frequency Offset Register (FOR) Bits - Read Only
Bit
Name
Description
15 - 0
LDT15 - 0
Lock Detect Threshold Bits
The binary value of these bits defines the upper limit of the absolute phase from the
phase detector output for lock detection.
When the value of the absolute phase is less than or equal to LDT for duration of time
defined by the LDIR register, the DPLL locks.
When the value of the absolute phase is greater than LDT for duration of time defined by
the LDIR register divided by 256, the DPLL does not lock.
Note: LDT should be calculated as per the maximum expected amplitude of jitter on the active input reference
using the following formula:
LDT = MAX_EXP_JITTER (ns) x 2
15.2 (ns)
Example: If maximum expected jitter amplitude on 2.048 MHz reference is 10UI (i.e., 10 x 488.2 ns = 4882 ns)
(assuming the jitter frequency where DPLL attenuation is big), the LDT should be programmed to be (4882/15.2)
x 2 = 642 = 0282
H
Table 33 - Lock Detector Threshold Register (LDTR) Bits
External Read Only Address: 0045
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
FOF
14
FOF
13
FOF
12
FOF
11
FOF
10
FOF
9
FOF
8
FOF
7
FOF
6
FOF
5
FOF
4
FOF
3
FOF
2
FOF
1
FOF
0
External Read/Write Address: 0047
H
Reset Value: 000F
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
LDT
15
LDT
14
LDT
13
LDT
12
LDT
11
LDT
10
LDT
9
LDT
8
LDT
7
LDT
6
LDT
5
LDT
4
LDT
3
LDT
2
LDT
1
LDT
0
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50022QCG1 制造商:Microsemi Corporation 功能描述:PB FREE 4K +RATE CONVERSION & 256L LQFP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP
ZL50023 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 4 K Digital Switch
ZL50023_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 4 K Digital Switch
ZL50023GAC 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50023GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 4K X 4K 1.8V/3.3V 256BGA - Trays 制造商:Microsemi Corporation 功能描述:PB FREE PARALLEL ACCESS CIRCUIT (PAC) 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
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