參數(shù)資料
型號(hào): ZL50022QCC
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 路由/交換
英文描述: Enhanced 4 K Digital Switch with Stratum 4E DPLL
中文描述: TELECOM, DIGITAL TIME SWITCH, PQFP256
封裝: 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256
文件頁數(shù): 61/121頁
文件大?。?/td> 939K
代理商: ZL50022QCC
ZL50022
Data Sheet
61
Zarlink Semiconductor Inc.
Bit
Name
Description
15 - 2
Unused
Reserved
In normal functional mode, these bits are zero.
1
OUTERR
Output Error (Read Only)
This bit is set high when the total number of output channels is programmed to be
more than the maximum capacity of 4096, in which case the output channels beyond
the maximum capacity should be disabled.
This bit will be cleared automatically after programming is corrected.
0
INERR
Input Error (Read Only)
This bit is set high when the total number of input channels is programmed to be more
than the maximum capacity of 4096, in which case the input channels beyond the
maximum capacity should be disabled.This bit will be cleared automatically after pro-
gramming is corrected.
Table 23 - Internal Flag Register (IFR) Bits - Read Only
Bit
Name
Description
15 - 0
BERF[n]
BER Error Flag[n]:
If BERF[n] is high, it indicates that BER Receiver Error Register [n] (BRER[n]) is not
zero.
If BERF[n] is low, it indicates that BER Receiver Error Register [n] (BRER[n]) is zero.
Note: [n] denotes input stream from 0 - 15.
Table 24 - BER Error Flag Register 0 (BERFR0) Bits - Read Only
External Read Address: 0010
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT
ERR
IN
ERR
External Read Address: 00011
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BER
F15
BER
F14
BER
F13
BER
F12
BER
F11
BER
F10
BER
F9
BER
F8
BER
F7
BER
F6
BER
F5
BER
F4
BER
F3
BER
F2
BER
F1
BER
F0
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