參數(shù)資料
型號(hào)： ZL30120GGG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 數(shù)字傳輸電路
英文描述： SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer
中文描述： ATM/SONET/SDH SUPPORT CIRCUIT, PBGA100
封裝： 9 X 9 MM, 0.80 MM PITCH, CABGA-100
文件頁(yè)數(shù)： 17/27頁(yè)
文件大小： 309K
代理商： ZL30120GGG
ZL30120
Data Sheet
17
Zarlink Semiconductor Inc.
1.6 Configurable Input-to-Output and Output-to-Output Delays
The ZL30120 allows programmable static delay compensation for controlling input-to-output and output-to-output
delays of its clocks and frame pulses.
All of the output synthesizers (APLL, P0, P1, Feedback) locked to DPLL1 can be configured to lead or lag the
selected input reference clock using the
DPLL1 Fine Delay
. The delay is programmed in steps of 119.2 ps with a
range of -128 to +127 steps giving a total delay adjustment in the range of -15.26 ns to +15.14 ns. Negative values
delay the output clock, positive values advance the output clock. Synthesizers that are locked to DPLL2 are
unaffected by this delay adjustment.
In addition to the fine delay introduced in the DPLL1 path, the APLL, P0, and P1 synthesizers have the ability to add
their own fine delay adjustments using the
P0 Fine Delay
,
P1 Fine Delay
, and
APLL Fine Delay
. These delays are
also programmable in steps of 119.2 ps with a range of -128 to +127 steps.
In addition to these delays, the single-ended output clocks of the APLL, P0, and P1 synthesizers can be
independently offset by 90, 180 and 270 degrees using the
Coarse Delay
. The output frame pulses (APLL, P0) can
be independently offset with respect to each other using the
FP Delay
.
Figure 7 - Phase Delay Adjustments
DPLL1
DPLL2
P0 Fine Delay
p0_clk0
p0_clk1
p0_fp0
p0_fp1
P0
Synthesizer
Coarse Delay
Coarse Delay
FP Delay
FP Delay
fb_clk
p1_clk0
p1_clk1
P1 Fine Delay
Low Jitter
APLL
apll_clk0
apll_clk1
apll_fp0
apll_fp1
APLL Fine Delay
Feedback
Synthesizer
DPLL1 Fine Delay
Coarse Delay
Coarse Delay
FP Delay
FP Delay
Coarse Delay
Coarse Delay
P1
Synthesizer
相關(guān)PDF資料
PDF描述
ZL30120GGG2 SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer
ZL30121GGG2 SONET/SDH Low Jitter System Synchronizer
ZL30121 SONET/SDH Low Jitter System Synchronizer
ZL30121GGG SONET/SDH Low Jitter System Synchronizer
ZL30122 SONET/SDH Low Jitter Line Card Synchronizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL30120GGG2 制造商:Microsemi Corporation 功能描述:LINE CARD SYNCHRONIZER 100CABGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC LINE CARD SYNCH 100CABGA 制造商:Microsemi Corporation 功能描述:IC LINE CARD SYNCH 100CABGA
ZL30121 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:SONET/SDH Low Jitter System Synchronizer
ZL30121GGG 制造商:Microsemi Corporation 功能描述:SYS SYNCHRONIZER 100CABGA - Trays
ZL30121GGG2 制造商:Microsemi Corporation 功能描述:PB FREE LOW JITTER SYSTEM SYNCHRONIZER
ZL30121GGG2V2 制造商:Microsemi Corporation 功能描述:REV 2 PB FREE LOW JITTER SYSTEM SYNCHRO 制造商:Microsemi Corporation 功能描述:REV 2 PB FREE LOW JITTER SYSTEM SYNCHRO - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SONET/SDH SYNCH 100CABGA 制造商:Microsemi Corporation 功能描述:IC SONET/SDH SYNCH 100CABGA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*