參數(shù)資料
型號: ZL30117GGG2
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: SONET/SDH OC-48/OC-192 Line Card Synchronizer
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PBGA64
封裝: 9 X 9 MM, 1 MM PITCH, LEAD FREE, CABGA-64
文件頁數(shù): 14/24頁
文件大?。?/td> 388K
代理商: ZL30117GGG2
ZL30117
Data Sheet
14
Zarlink Semiconductor Inc.
Coarse Frequency Monitor (CFM)
The CFM block monitors the reference frequency over a measurement period of 30
μ
s so that it can quickly detect
large changes in frequency. A CFM failure (cfm_fail) is triggered when the frequency has changed by more than 3%
or approximately 30000 ppm.
Precise Frequency Monitor (PFM)
The PFM block measures the frequency accuracy of the reference over a 10 second interval. To ensure an
accurate frequency measurement, the PFM measurement interval is re-initiated if phase or frequency irregularities
are detected by the SCM or CFM. The PFM provides a level of hysteresis between the acceptance range and the
rejection range to prevent a failure indication from toggling between valid and invalid for references that are on the
edge of the acceptance range.
When determining the frequency accuracy of the reference input, the PFM uses the external oscillator’s output
frequency (f
ocsi
) as its point of reference.
Guard Soak Timer (GST)
The GST block mimics the operation of an analog integrator by accumulating failure events from the CFM and the
SCM blocks and applying a selectable rate of decay when no failures are detected.
As shown in Figure 5, a GST failure (gst_fail) is triggered when the accumulated failures have reached the upper
threshold during the disqualification observation window. When there are no CFM or SCM failures, the accumulator
decrements until it reaches its lower threshold during the qualification window.
Figure 5 - Behaviour of the Guard Soak Timer during CFM or SCM Failures
Sync Ratio Monitor
All sync inputs (
sync0 to sync2
) are continuously monitored to ensure that there is a correct number of reference
clock cycles within the frame pulse period.
ref
CFM or SCM failures
upper threshold
lower threshold
t
d
- disqualification time
t
q
- qualification time = n * t
d
t
d
t
q
gst_fail
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相關(guān)代理商/技術(shù)參數(shù)
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ZL30120 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH/Ethernet Multi-Rate Line Card Synchronizer