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參數(shù)資料
| 型號： | ZL30106QDG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH/PDH Network Interface DPLL |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.0 MM HEIGHT, MS-026ACD, TQFP-64 |
| 文件頁數(shù)： | 23/48頁 |
| 文件大小： | 423K |
| 代理商： | ZL30106QDG |
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ZL30106
Data Sheet
23
Zarlink Semiconductor Inc.
Figure 12 - Mode Switching in Normal Mode
4.4.4 Automatic Mode
The Automatic mode combines the functionality of the Normal mode (automatic Holdover) with automatic reference
switching. The automatic reference switching is described in more detail in section 4.5.2, “Automatic Reference
Switching“.
4.5 Reference Switching
4.5.1 Manual Reference Switching
In the manual modes of operation (MODE_SEL1:0
≠
11) the active reference input (REF0, REF1 or REF2) is
selected by the REF_SEL1 and REF_SEL0 pins as shown in Table 5. When the logic value of the REF_SEL pins is
changed when the DPLL is in Normal mode, the ZL30106 will perform a hitless reference switch.
When the REF_SEL inputs are used in Normal mode to force a change from the currently selected reference to
another reference, the action of the LOCK output will depend on the relative frequency and phase offset of the old
and new references. Where the new reference has enough frequency offset and/or TIE-corrected phase offset to
force the output outside the phase-lock-window, the LOCK output will de-assert, the lock-qualify timer is reset, and
LOCK will stay de-asserted for the full lock-time duration. Where the new reference is close enough in frequency
and TIE-corrected phase for the output to stay within the phase-lock-window, the LOCK output will remain asserted
through the reference-switch process.
REF_SEL1
REF_SEL0
Input Reference Selected
0
0
REF0
0
1
REF1
1
0
REF2
1
1
REF2
Table 5 - Manual Reference Selection
REF_DIS=1: Current selected reference disrupted (see Figure 3)
REF_CH= 1: Reference change, a transition in the reference selection (see Figure 14)
or a change in the REF_SEL pins.
TIE Correction
(HOLDOVER=1)
Holdover
(HOLDOVER=1)
REF_DIS=0
REF_CH=1 and (REF_SYNC failed)
REF_DIS=0 and
REF_CH=0 and
HMS=0
REF_DIS=1
(REF_DIS=0 and HMS=1) or
REF_CH=1
REF_DIS=1
RST
Normal
(HOLDOVER=0)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL30106QDG1 | 制造商:Zarlink Semiconductor Inc 功能描述:SONET/SDH/PDH NETWORK INTRFC 64TQFP - Trays 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE SONET/SDH/PDH NTWK INTERFACEDPLL |
| ZL30107 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:GbE Line Card Synchronizer |
| ZL30107GGG | 制造商:Microsemi Corporation 功能描述: 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER ETH SGL 64CABGA 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER ETH SGL 64CABGA |
| ZL30107GGG2 | 制造商:Microsemi Corporation 功能描述:GBE LINE CARD SYNCHRONIZER 64CABGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SYNCHRONIZER ETH SGL 64CABGA 制造商:Microsemi Corporation 功能描述:IC SYNCHRONIZER ETH SGL 64CABGA |
| ZL30108 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Network Interface DPLL |
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