參數(shù)資料
型號(hào)： Z86E61
廠商： ZiLOG, Inc.
英文描述： CMOS Z8 16K/32K EPROM MICROCONTROLLER
中文描述： Z8 16K/32K的CMOS存儲(chǔ)器單片機(jī)
文件頁(yè)數(shù)： 15/44頁(yè)
文件大?。?/td> 466K
代理商： Z86E61
15
Z86E61/E63 Z8
MCU
WITH
16K/32K EPROM
P R E L I M I N A R Y
FUNCTIONAL DESCRIPTION
Counter/Timers
.
There are two 8-bit programmable
counter/timers (T0-T1), each driven by its own 6-bit pro-
grammable prescaler. The T1 prescaler is driven by inter-
nal or external clock sources; however, the T0 prescaler is
driven by the internal clock only (Figure 15).
The 6-bit prescalers can divide the input frequency of the
clock source by any integer number from 1 to 64. Each
prescaler drives its counter, which decrements the value
(1 to 256) that has been loaded into the counter. When both
the counters and prescalers reach the end of the count,
a timer interrupt request, IRQ4 (T0) or IRQ5 (T1), is
generated.
The counter is programmed to start, stop, restart to con-
tinue, or restart from the initial value. The counters can also
be programmed to stop upon reaching zero (single pass
mode) or to automatically reload the initial value and
continue counting (modulo-n continuous mode).
The counter, but not the prescalers, are read at any time
without disturbing their value or count mode. The clock
source for T1 is user-definable and is either the internal
microprocessor clock divided-by-four, or an external sig-
nal input through Port 3. The Timer Mode register config-
ures the external timer input (P31) as an external clock, a
trigger input that can be retriggerable or non-retriggerable,
or as a gate input for the internal clock. Port 3 line P36 also
serves as a timer output (T
) through which T0, T1, or the
internal clock can be output. The counter/timers are cas-
caded by connecting the T0 output to the input of T1.
Figure 15. Counter/Timers Block Diagram
OSC
PRE0
Initial Value
Register
T0
Initial Value
Register
T0
Current Value
Register
6-Bit
Down
Counter
8-bit
Down
Counter
÷
4
6-Bit
Down
Counter
8-Bit
Down
Counter
PRE1
Initial Value
Register
T1
Initial Value
Register
T1
Current Value
Register
÷
2
Clock
Logic
IRQ4
IRQ5
Internal Data Bus
Write
Write
Read
Internal Clock
Gated Clock
Triggered Clock
Tin P31
Write
Write
Read
Internal Data Bus
External Clock
Internal
Clock
÷
4
÷
2
Serial I/O
Clock
TOUT
P36
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