參數(shù)資料
型號: Z86E64
廠商: ZiLOG, Inc.
英文描述: CMOS Z8 OTP Microcontroller
中文描述: 檢察官辦公室的CMOS Z8微控制器
文件頁數(shù): 1/12頁
文件大?。?/td> 91K
代理商: Z86E64
CP96DZ83200 (10/96)
P R E L I M I N A R Y
1
1
P
RELIMINARY
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86E64
CMOS Z8 OTP M
1
ICROCONTROLLER
FEATURES
I
Low-Power Consumption: 200 mW (max)
I
Fast Instruction Pointer: 0.75
μ
s @ 16 MHz
I
Two Standby Modes: STOP and HALT
I
Full-Duplex UART
I
All Digital Inputs are TTL Levels
I
Auto Latches
I
RAM and ROM Protect
I
Two Programmable 8-Bit Counter/Timers,
Each with 6-Bit Programmable Prescaler
I
Six Vectored, Priority Interrupts from Eight Different
Sources
I
Low EMI Mode Option
I
68-Pin Leaded Chip-Carrier
GENERAL DESCRIPTION
The Z86E64 is a member of the Z8 single-chip microcon-
troller family. The Z86E64 can address both external mem-
ory and pre-programmed ROM, which enables this Z8
MCU
to be used in high-volume applications where
code flexibility is required.
TM
The Z86E64 is a pin compatible, One-Time-Programmable
(OTP) version of the Z86C64. The Z86E64 contains 32 KB
of EPROM memory in place of the 32 KB of ROM on the
Z86C64.
There are three basic address spaces available to support
this wide range of configuration: Program Memory, Data
Memory, and 236 general-purpose registers.
The Z86E64 offers a flexible I/O scheme, an efficient reg-
ister and address space structure, multiplexed capabilities
between address/data, I/O, and a number of ancillary fea-
tures that are useful in many industrial and advanced sci-
entific applications.
For applications demanding powerful I/O capabilities, the
Z86E64’s dedicated input and output lines are grouped
into six ports. Each port consists of eight lines, except port
6, which has four lines. Each port is configurable under
software control to provide timing, status signals, serial or
parallel I/O with or without handshake, and an address/da-
ta bus for interfacing external memory.
The Z86E64 offers two on-chip counter/timers with a large
number of user-selectable modes, and an Universal Asyn-
chronous Receiver/Transmitter (UART). See figure 1 for-
Functional Block description.
Note:
tive Low, for example: B//W (WORD is active Low); /B/W
(BYTE is active Low, only). Power connections follow con-
ventional descriptions below:
All Signals with a preceding front slash, "/", are ac-
Device
Z86E64
ROM
(KB)
32
RAM*
(Bytes)
236
I/O
Lines
52
Voltage
Range
4.5-5V
Note:
*General-Purpose
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
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