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參數(shù)資料
| 型號： | Z0220516SSCR4292 |
| 英文描述： | Modem Controller |
| 中文描述： | 調(diào)制解調(diào)器控制器 |
| 文件頁數(shù)： | 40/48頁 |
| 文件大?。?/td> | 1331K |
| 代理商： | Z0220516SSCR4292 |
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Z02201
V.22bis Data Pump with Integrated AFE
ZiLOG
40
Z02201
PS000902-0501
USING HDLC
The data pump includes HDLC firmware operating in all
data modes. The HDLC firmware performs all the
necessary operations to frame host-supplied data into
HDLC format, including automatic opening and closing
flag generation, zero insertion and deletion, flag and abort
detection, and CRC checksum computation and checking.
HDLC Operation
During HDLC operation, the data pump frames host-
supplied asynchronous data into a synchronous data stream
in the transmitter, and extracts the same asynchronous data
from the received synchronous data stream in the receiver.
The inclusion of 16-bit cyclic redundancy check (CRC)
information in the frames allows the receiving host to check
whether the data has been correctly received.
HDLC data is sent in frames. A frame consists of a number
of bytes, each composed of 8 data bits. A frame contains
an opening flag, frame data bytes, two CRC checksum
bytes, and a closing flag, respectively. Opening flags and
closing flags indicate the start and the end of a frame,
respectively.
A flag, byte value
07EH
, is one of two HDLC control
symbols. The other is an abort, which is any sequence of
consecutive binary 1s more than six bits long. If the frames
do not use the bandwidth of the data mode (for example,
when there is no host data to transmit), the modem fills the
remaining bandwidth by sending flags between frames.
Frame data bytes for transmission are supplied by the host
to the data pump’s
DATAP
register. These bytes are
modified by the data pump to ensure that no more than five
consecutive binary
1
bits are sent. To accomplish this
modification, the transmitting modem inserts a single
0
bit
after every five consecutive binary 1 bits in the host supplied
data. This zero insertion process allows the receiving
modem’s data pump to distinguish between frame data,
flags, and aborts. The receiving modem’s data pump uses
a zero deletion process to remove each inserted
0
bit before
returning the data to the receiving modem's host.
When a frame is to be closed, the frame's two CRC
checksum bytes are sent immediately following the frame
data. The CRC checksum is computed without the inserted
zeroes. The frame’s closing flag is transmitted following the
CRC. This flag may also serve as the opening flag of the
next frame, saving bandwidth.
Enabling HDLC Operation
The data pump’s HDLC firmware is disabled at power-up
and any reset, and can be enabled only in parallel mode
(Reg4., bit
4
(
TPDM
) is 1). To enable HDLC, set
BUFCTRL
, bit
7
(
HDLC
) to
1
, and bits 8–15 of
BUFCTRL
to 0 prior to beginning data mode operation. The host also
reads register
DATAP
just before starting data mode to clear
DATAP
.
These examples demonstrate the use of the data pump in
parallel mode to transmit and receive HDLC data frames.
The examples assume that the data pump has just been put
in data mode, and HDLC operation is enabled. The data to
be sent or received is the sequence of N bytes
(Byte1–ByteN), where Byte1 is sent (or received) first.
Transmitting
1. When Reg5, bit
7
(
TXI
) is
1
, write Byte1 to
DATAP
.
Repeat this step for each byte to be transmitted. If
Reg4, bit
7
(
TXIE
) is
1
, the data pump generates an
interrupt when it is ready to transmit the next byte, for
example, when the byte sets Reg5, bit
7
(
TXI
) to
1
.
2. When the last byte, ByteN, has been sent, wait for the
data pump to set Reg7, bit
2
(
TEND
) to
1
. This
function indicates the data pump has closed the current
frame. The data pump now computes and transmits the
CRC checksum and closing flag for the frame. The
data pump does not set Reg7, bit
7
(
TEND
) to
1
until
at least 8 bit times after it has set Reg4, bit
7
(
TXI
) to
1
, indicating the data pump is ready to transmit
another data byte. To transmit another frame, repeat
steps 1–2.
3. When the data pump begins sending the frame's
closing flag, it sets Reg7, bit
2
(
TEND
) to
0
.
Transmission of the frame is complete 8 bit times after
the data pump sets Reg7, bit
7
(
TEND
) to
0
.
Receiving
1. Prepare to receive a new frame.
2. When Reg5, bit
6
(
RXI
) is
1
, the data pump has
received a byte. First read register Reg7, followed by
DATAP
. Register 7 (Reg7) is read first, because the
data pump may change it any time after
DATAP
is
read. If Reg4,
6
(
RXIE
) is
1
, the data pump generates
an interrupt when it sets Reg5, bit
6
(
RXI
)
1
.
Act on the value of Reg7 read in step 2 as follows:
3.
If
RXERROR
is
0
and
EOF
is
0
, then the
DATAP
value
read in step 2 is an HDLC frame byte. Repeat step 2 to
receive all remaining frame bytes.
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