參數(shù)資料
型號(hào)： XRT86VL34
廠商： Exar Corporation
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁(yè)數(shù)： 7/156頁(yè)
文件大?。?/td> 816K
代理商： XRT86VL34
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XRT86VL34
B
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
Table 59:: LAPD Buffer 1 Control Register (LAPDBCR1) Hex Address: 0xn700 ......................................79
Table 60:: PMON Receive Line Code Violation Counter MSB (RLCVCU) Hex Address: 0xn900 ................. 80
Table 61:: PMON Receive Line Code Violation Counter LSB (RLCVCL) Hex Address: 0xn901 ................ 80
Table 62:: PMON Receive Framing Alignment Bit Error Counter MSB (RFAECU) Hex Address: 0xn902 ................... 81
Table 63:: PMON Receive Framing Alignment Bit Error Counter LSB (RFAECL) Hex Address: 0xn903 .................... 81
Table 64:: PMON Receive Severely Errored Frame Counter (RSEFC) Hex Address: 0xn904 ................... 82
Table 65:: PMON Receive CRC-6 BIT Error Counter - MSB (RSBBECU) Hex Address: 0xn905 ................. 83
Table 66:: PMON Receive CRC-6 Bit Error Counter - LSB (RSBBECL) Hex Address: 0xn906 ................ 83
Table 67:: PMON Receive Slip Counter (RSC) Hex Address: 0xn909 ............... 84
Table 68:: PMON Receive Loss of Frame Counter (RLFC) Hex Address: 0xn90A ................ 84
Table 69:: PMON Receive Change of Frame Alignment Counter (RCFAC) Hex Address: 0xn90B ................ 84
Table 70:: PMON LAPD1 Frame Check Sequence Error Counter 1 (LFCSEC1) Hex Address: 0xn90C ................. 85
Table 71:: PRBS Bit Error Counter MSB (PBECU) Hex Address: 0xn90D ................. 85
Table 72:: PRBS Bit Error Counter LSB (PBECL) Hex Address: 0xn90E ................. 85
Table 73:: Transmit Slip Counter (TSC) Hex Address: 0xn90F ............... 86
Table 74:: Excessive Zero Violation Counter MSB (EZVCU) Hex Address: 0xn910 ................. 86
Table 75:: Excessive Zero Violation Counter LSB (EZVCL) Hex Address: 0xn911 ................. 86
Table 76:: PMON LAPD2 Frame Check Sequence Error Counter 2 (LFCSEC2) Hex Address: 0xn91C ................. 87
Table 77:: PMON LAPD2 Frame Check Sequence Error Counter 3 (LFCSEC3) Hex Address: 0xn92C ................. 87
Table 78:: Block Interrupt Status Register (BISR) Hex Address: 0xnB00 .................... 88
Table 79:: Block Interrupt Enable Register (BIER) Hex Address: 0xnB01 ................... 90
Table 80:: Alarm & Error Interrupt Status Register (AEISR) Hex Address: 0xnB02 .....................92
Table 81:: Alarm & Error Interrupt Enable Register (AEIER) Hex Address: 0xnB03 ...................... 94
Table 82:: Framer Interrupt Status Register (FISR) Hex Address: 0xnB04 ................... 95
Table 83:: Framer Interrupt Enable Register (FIER) Hex Address: 0xnB05 ................... 97
Table 84:: Data Link Status Register 1 (DLSR1) Hex Address: 0xnB06 ................ 99
Table 85:: Data Link Interrupt Enable Register 1 (DLIER1) Hex Address: 0xnB07 ................. 101
Table 86:: Slip Buffer Interrupt Status Register (SBISR) Hex Address: 0xnB08 ...................103
Table 87:: Slip Buffer Interrupt Enable Register (SBIER) Hex Address: 0xnB09 .................. 106
Table 88:: Receive Loopback Code Interrupt and Status Register (RLCISR) Hex Address: 0xnB0A ...................108
Table 89:: Receive Loopback Code Interrupt Enable Register (RLCIER) Hex Address: 0xnB0B ...................109
Table 90:: Excessive Zero Status Register (EXZSR) Hex Address: 0xnB0E ................ 110
Table 91:: Excessive Zero Enable Register (EXZER) Hex Address: 0xnB0F .............. 110
Table 92:: SS7 Status Register for LAPD1 (SS7SR1) Hex Address: 0xnB10 ................ 111
Table 93:: SS7 Enable Register for LAPD1 (SS7ER1) Hex Address: 0xnB11 .............. 111
Table 94:: RxLOS/CRC Interrupt Status Register (RLCISR) Hex Address: 0xnB12 ............... 112
Table 95:: RxLOS/CRC Interrupt Enable Register (RLCIER) Hex Address: 0xnB13 ............... 112
Table 96:: Data Link Status Register 2 (DLSR2) Hex Address: 0xnB16 ............... 113
Table 97:: Data Link Interrupt Enable Register 2 (DLIER2) Hex Address: 0xnB17 ................. 115
Table 98:: SS7 Status Register for LAPD2 (SS7SR2) Hex Address: 0xnB18 ................ 117
Table 99:: SS7 Enable Register for LAPD2 (SS7ER2) Hex Address: 0xnB19 ................ 117
Table 100:: Data Link Status Register 3 (DLSR3) Hex Address: 0xnB26 ............. 118
Table 101:: Data Link Interrupt Enable Register 3 (DLIER3) Hex Address: 0xnB27 .............. 120
Table 102:: SS7 Status Register for LAPD3 (SS7SR3) Hex Address: 0xnB28 ............. 122
Table 103:: SS7 Enable Register for LAPD3 (SS7ER3) Hex Address: 0xnB29 ............122
Table 104:: Customer Installation Alarm Status Register (CIASR) Hex Address: 0xnB40 .................. 123
Table 105:: Customer Installation Alarm Status Register (CIAIER) Hex Address: 0xnB41 .................. 124
Table 106:: LIU Channel Control Register 0 (LIUCCR0) Hex Address: 0x0Fn0 ............125
Table 107:: Equalizer Control and Transmit Line Build Out ........................................................................................... 127
Table 108:: LIU Channel Control Register 1 (LIUCCR1) Hex Address: 0x0Fn1 ........... 128
Table 109:: LIU Channel Control Register 2 (LIUCCR2) Hex Address: 0x0Fn2 ............130
Table 110:: LIU Channel Control Register 3 (LIUCCR3) Hex Address: 0x0Fn3 ........... 132
Table 111:: LIU Channel Control Interrupt Enable Register (LIUCCIER) Hex Address: 0x0Fn4 ................. 134
Table 112:: LIU Channel Control Status Register (LIUCCSR) Hex Address: 0x0Fn5 ................ 136
Table 113:: LIU Channel Control Interrupt Status Register (LIUCCISR) Hex Address: 0x0Fn6 .................... 139
Table 114:: LIU Channel Control Cable Loss Register (LIUCCCCR) Hex Address: 0x0Fn7 ............... 140
Table 115:: LIU Channel Control Arbitrary Register 1 (LIUCCAR1) Hex Address: 0x0Fn8 .................. 141
Table 116:: LIU Channel Control Arbitrary Register 2 (LIUCCAR2) Hex Address: 0x0Fn9 ..................... 141
Table 117:: LIU Channel Control Arbitrary Register 3 (LIUCCAR3) Hex Address: 0x0FnA ..................... 141
Table 120:: LIU Channel Control Arbitrary Register 6 (LIUCCAR6) Hex Address: 0x0FnD ..................... 142
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL34_07 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
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