XRT86VL32
29
DUAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. V1.2.0
T
ABLE
10: R
ECEIVE
S
IGNALING
C
HANGE
R
EGISTER
0 (RSCR 0) H
EX
A
DDRESS
: 0
X
n10D
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Ch. 0
RUR
0
These bits indicate whether the Channel Associated signaling data,
associated with Time-Slots 0 through 7 within the incoming E1 data-
stream, has changed since the last read of this register, as depicted
below.
0 - CAS data (for Time-slots 0 through 7) has NOT changed since the
last read of this register.
1 - CAS data (for Time-slots 0 through 7) HAS changed since the last
read of this register.
N
OTES
:
1. Bit 7 (Time-Slot 0) is NOT active, since it carries the FAS and
National Bits.
N
OTE
:
2. This register is only active if the incoming E1 data-stream is
using Channel Associated Signaling.
6
Ch. 1
RUR
0
5
Ch.2
RUR
0
4
Ch.3
RUR
0
3
Ch.4
RUR
0
2
Ch.5
RUR
0
1
Ch.6
RUR
0
0
Ch.7
RUR
0
T
ABLE
11: R
ECEIVE
S
IGNALING
C
HANGE
R
EGISTER
1 (RSCR 1) H
EX
A
DDRESS
: 0
X
n10E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Ch.8
RUR
0
These bits indicate whether the Channel Associated signaling data,
associated with Time-Slots 8 through 15 within the incoming E1 data-
stream, has changed since the last read of this register, as depicted
below.
0 - CAS data (for Time-slots 8 through 15) has NOT changed since the
last read of this register.
1 - CAS data (for Time-slots 8 through 15) HAS changed since the last
read of this register.
N
OTE
:
This register is only active if the incoming E1 data-stream is
using Channel Associated Signaling.
6
Ch.9
RUR
0
5
Ch.10
RUR
0
4
Ch.11
RUR
0
3
Ch.12
RUR
0
2
Ch.13
RUR
0
1
Ch.14
RUR
0
0
Ch.15
RUR
0
T
ABLE
12: R
ECEIVE
S
IGNALING
C
HANGE
R
EGISTER
2 (RSCR 2) H
EX
A
DDRESS
: 0
X
n10F
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Ch.16
RUR
0
These bits indicate whether the Channel Associated signaling data,
associated with Time-Slots 16 through 23 within the incoming E1 data-
stream, has changed since the last read of this register, as depicted
below.
0 - CAS data (for Time-slots 16 through 23) has NOT changed since
the last read of this register.
1 - CAS data (for Time-slots 16 through 23) HAS changed since the
last read of this register.
N
OTE
:
This register is only active if the incoming E1 data-stream is
using Channel Associated Signaling.
6
Ch.17
RUR
0
5
Ch.18
RUR
0
4
Ch.19
RUR
0
3
Ch.20
RUR
0
2
Ch.21
RUR
0
1
Ch.22
RUR
0
0
Ch.23
RUR
0