參數(shù)資料
型號： XRT83SL34
廠商： Exar Corporation
英文描述： QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： 上海四的T1/E1/J1收發(fā)器時鐘恢復(fù)和抖動衰減器
文件頁數(shù)： 37/80頁
文件大?。?/td> 856K
代理商： XRT83SL34
XRT83SL34
QUAD T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.0.8
PRELIMINARY
39
In the Remote Loop-Back mode if the jitter attenuator is selected in the transmit path, the receive data from the
Clock and Data Recovery block is looped back to the transmit path and is applied to the jitter attenuator using
RCLK as transmit timing. In this mode the transmit clock and data are also ignored, while RCLK and received
data will continue to be available at their respective output pins. Remote Loop-Back with the jitter attenuator
selected in the transmit path is shown in Figure 20.
DIGITAL LOOP-BACK (DLOOP)
Digital Loop-Back or Local Loop-Back allows the transmit clock and data to be looped back to the
corresponding receiver output pins through the encoder/decoder and jitter attenuator. In this mode, receive
data and clock are ignored, but the transmit data will be sent to the line uninterrupted. This loop back feature
allows users to configure the line interface as a pure jitter attenuator. The Digital Loop-Back signal flow is
shown in Figure 21.
FIGURE 20. REMOTE LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH
FIGURE 21. DIGITAL LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH
Tx
Decoder
Timing
Control
Rx
Clock &
Data
Recovery
JA
TPOS
TNEG
TCLK
RCLK
RPOS
RNEG
Encoder
TTIP
TRING
RTIP
RRING
Tx
Decoder
Timing
Control
Rx
Data &
Clock
Recovery
JA
TPOS
TNEG
TCLK
RCLK
RPOS
RNEG
Encoder
TTIP
TRING
RTIP
RRING
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