參數(shù)資料
型號: XRT75L06IB-F
廠商: Exar Corporation
文件頁數(shù): 1/63頁
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 6CH 217BGA
標(biāo)準包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 6/6
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 217-BBGA
供應(yīng)商設(shè)備封裝: 217-BGA(23x23)
包裝: 托盤
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XRT75L06
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
MARCH 2004
REV. 1.0.3
GENERAL DESCRIPTION
The XRT75L06 is a six channel fully integrated Line
Interface Unit (LIU) for E3/DS3/STS-1 applications.
The LIU incorporates 6 independent Receivers,
Transmitters and Jitter Attenuators in a single 217
Lead BGA package.
Each channel of the XRT75L06 can be independently
configured to operate in E3 (34.368 MHz), DS3
(44.736
MHz)
or
STS-1
(51.84
MHz).
Each
transmitter can be turned off and tri-stated for
redundancy support or for conserving power.
The XRT75L06’s differential receiver provides high
noise interference margin and is able to receive data
over 1000 feet of cable or with up to 12 dB of cable
attenuation.
The XRT75L06 incorporates an advanced crystal-
less jitter attenuator per channel that can be selected
either in the transmit or receive path. The jitter
attenuator performance meets the ETSI TBR-24 and
Bellcore GR-499 specifications.
The XRT75L06 provides a Parallel Microprocessor
Interface for programming and control.
The XRT75L06 supports analog, remote and digital
loop-backs. The device also has a built-in Pseudo
Random Binary Sequence (PRBS) generator and
detector with the ability to insert and detect single bit
error for diagnostic purposes.
APPLICATIONS
E3/DS3 Access Equipment
DSLAMs
Digital Cross Connect Systems
CSU/DSU Equipment
Routers
Fiber Optic Terminals
FIGURE 1. BLOCK DIAGRAM OF THE XRT 75L06
ORDERING INFORMATION
PART NUMBER
PACKAGE
OPERATING TEMPERATURE RANGE
XRT75L06IB
217 Lead BGA
-40°C to +85°C
XRT75L06
Channel 5
Channel 0
Channel n...
Device
Monitor
MTIP_n
MRing_n
DMO_n
Timing
Control
Tx
Pulse
Shaping
HDB3/
B3ZS
Encoder
Tx
Control
Jitter
Attenuator
MUX
Line
Driver
Remote
LoopBack
HDB3/
B3ZS
Decoder
MUX
AGC/
Equalizer
Peak Detector
LOS
Detector
Slicer
Jitter
Attenuator
Processor Interface
Local
LoopBack
Clock & Data
Recovery
Clock
Synthesizer
RD
WR
Addr[7:0]
CS
INT
D[7:0]
TxON
TxClk_n
TxPOS_n
TxNEG_n
RxClk_n
RxPOS_n
RxNEG/LCV_n
RLOS_n
RLOL_n
RTIP_n
RRing_n
TTIP_n
TRing_n
CLKOUT_n
SFM_en
E3Clk
DS3Clk
STS-Clk/12M
ICT
Pmode
RDY
PCLK
RESET
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