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參數(shù)資料
| 型號： | XRT73L04 |
| 廠商： | Exar Corporation |
| 英文描述： | 4 Channel E3/DS3/STS-1 Line Interface Unit(4通道 E3/DS3/STS-1線接口單元) |
| 中文描述： | 4頻道E3/DS3/STS-1線路接口單元（4通道E3/DS3/STS-1線接口單元） |
| 文件頁數(shù)： | 56/62頁 |
| 文件大?。?/td> | 781K |
| 代理商： | XRT73L04 |
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XRT73L04
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. P1.0.5
á
PRELIMINARY
52
This bit-field is set to "0" if the Channel(n) Digital LOS
Detector is NOT currently declaring an LOS condi-
tion. This bit-field is set to "1" if the Channel(n) Digital
LOS Detector is currently declaring an LOS condition.
N
OTE
:
The purpose is to isolate the Detector (e.g., either
the Analog LOS or the Digital LOS detector) that is declar-
ing the LOS condition. This feature may be useful for trou-
bleshooting/debugging purposes.
Bit D0 - DMO (Drive Monitor Output Status - Chan-
nel(n))
This Read-Only bit-field reflects the status of the
DMO output pin.
5.2.2
Command Register CR1
The bit-format and default values for Command Reg-
ister CR1-(n) are listed below followed by the function
of each of these bit-fields..
COMMAND REGISTER CR1-(N)
Bit D4 - TxOFF(n) (Transmitter OFF - Channel(n))
This Read/Write bit-field is used to turn off the Chan-
nel(n) Transmitter.
Writing a "1" to this bit field turns off the Transmitter
and tri-state the Transmit Output. Writing a "0" to this
bit-field turns on the Transmitter.
Bit D3 - TAOS(n) (Transmit All OneS - Channel(n))
This Read/Write bit-field is used to command the
Channel(n) Transmitter to generate and transmit an
all “1’s” pattern onto the line.
Writing a "1" to this bit-field commands the Transmit-
ter to transmit an all “1’s” pattern onto the line. Writ-
ing a "0" to this bit-field commands normal operation.
Bit D2 - TxClkINV(n) (Transmit Clock Invert -
Channel(n))
This Read/Write bit-field is used to configure the
Transmitter to sample the signal at the TPData and
TNData pins on the rising edge or falling edge of Tx-
Clk (the Transmit Line Clock signal).
Writing a "1" to this bit-field configures the Transmitter
to sample the TPData and TNData input pins on the
rising edge of TxClk. Writing a “0" to this bit-field con-
figures the Transmitter to sample the TPData and
TNData input pins on the falling edge of TxClk.
Bit D1 - TxLEV(n) (Transmit Line Build-Out En-
able/Disable Select - Channel(n))
This Read/Write bit-field is used to enable or disable
the Channel(n) Transmit Line Build-Out circuit.
Setting this bit-field "High" disables the Channel(n)
Line Build-Out circuit. In this mode, Channel(n) out-
puts partially-shaped pulses onto the line via the
TTIP(n) and TRing(n) output pins.
Setting this bit-field "Low" enables the Channel(n)
Line Build-Out circuit. In this mode, Channel(n) out-
puts shaped pulses onto the line via the TTIP(n) and
TRing(n) output pins.
In order to comply with the Isolated DSX-3/STSX-1
Pulse Template Requiremnts per Bellcore GR-499-
CORE or GR-253-CORE:
a. Set this bit-field to "1" if the cable length between
the Cross-Connect and the transmit output of Chan-
nel(n) is greater than 225 feet.
b. Set this bit-field to "0" if the cable length between
the Cross-Connect and the transmit output of Chan-
nel(n) is less than 225 feet.
This bit-field is active only if the XRT73L04 is config-
ured to operate in the DS3 or SONET STS-1 Modes.
If the cable length is greater than 225 feet, set this bit-
field to "1" in order to increase the amplitude of the
Transmit Output Signal. If the cable length is less
than 225 feet, set this bit-field to "0".
N
OTE
:
This option is only available when the XRT73L04 is
operating in the DS3 or STS-1 Mode.
5.2.3
Command Register CR2-(n)
The bit-format and default values for Command Reg-
ister CR2-(n) are listed below followed by the function
of each of these bit fields.
Bit D4 - Reserved
Bit D3 - Reserved
Bit D2 - ALOSDIS (Analog LOS Disable - Chan-
nel(n))
D4
D3
D2
D1
D0
TxOFF(n)
TAOS(n) TxClkINV(n) TxLEV(n) Reserved
0
0
0
0
0
COMMAND REGISTER CR2-(N)
D4
D3
D2
D1
D0
Reserved
Reserved
ALOSDIS
DLOSDIS
REQEN
X
0
0
0
0
相關PDF資料 |
PDF描述 |
|---|---|
| XRT73L06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00AIV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04B | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04BES | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L04BIV | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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