XRT73L04
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. P1.0.5
á
PRELIMINARY
40
Declaring ALOS
A channel(n) declares ALOS(n) whenever the ampli-
tude of the receive line signal falls below the Signal
Level to Declare ALOS levels, as specified inTable 5.
Clearing ALOS(n)
A channel(n) clears ALOS(n) whenever the amplitude
of the receive line signal increases above the Signal
Level to Clear ALOS levels, as specified in Table 5.
There is approximately a 2dB hysteresis in the re-
ceived signal level that exists between declaring and
clearing ALOS(n) in order to prevent chattering in the
RLOS(n) output signal.
Monitoring the State of ALOS(n)
If the XRT73L04 is operating in the HOST Mode, the
state of ALOS(n) of Channel(n) can be polled or mon-
itored by reading in the contents of Command Regis-
ter CR0. .
COMMAND REGISTER CR0-(N)
If the ALOS(n) bit-field contains a "1", then the corre-
sponding Channel(n) is currently declaring an ALOS
condition. Conversely, if the ALOS(n) bit-field con-
tains a "0", then the channel is not currently declaring
an ALOS condition.
Disabling the ALOS Detector
For debugging purposes, it may be useful to disable
the ALOS Detector. If the XRT73L04 is operating in
the HOST Mode, disable the Channel(n) ALOS De-
tector by writing a "1" into the ALOSDIS(n) bit-field in
Command Register CR2.
2. The Digital LOS (DLOS) Declaration/Clearance
Criteria
A given channel(n) declares a Digital LOS (DLOS(n))
condition if the XRT73L04 detects 160±32 or more
consecutive "0’s" in the incoming data.
The channel clears DLOS if it detects four consecu-
tive sets of 32 bit-periods, each of which contains at
least 10 "1’s" (e.g., average pulse density of greater
than 33%).
Monitoring the State of DLOS
If the XRT73L04 is operating in the HOST Mode the
state of DLOS(n) of Channel(n) can be polled or mon-
T
ABLE
5: T
HE
ALOS (A
NALOG
LOS) D
ECLARATION
AND
C
LEARANCE
T
HRESHOLDS
FOR
A
GIVEN
SETTING
OF
LOSTHR
AND
REQEN (DS3
AND
STS-1 A
PPLICATIONS
)
A
PPLICATION
REQEN S
ETTING
LOSTHR S
ETTING
S
IGNAL
L
EVEL
TO
D
ECLARE
ALOS
S
GNAL
L
EVEL
TO
C
LEAR
ALOS
DS3
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
<55mV
<22mV
<35mV
<17mV
<75mV
<25mV
<55mV
<20mV
>220mV
>90mV
>155mV
>70mV
>270mV
>115mV
>210mV
>90mV
STS-1
D4
D3
D2
D1
D0
RLOL(n)
RLOS(n)
ALOS(n)
DLOS(n)
DMO(n)
Read Only
Read Only
Read Only
Read Only
Read Only
COMMAND REGISTER CR2-(N)
D4
D3
D2
D1
D0
Reserved
Reserved
ALOSDIS(n)
DLOSDIS(n)
REQEN(n)
X
X
1
X
X