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參數(shù)資料
| 型號： | XRT73L02MIV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 7/46頁 |
| 文件大?。?/td> | 391K |
| 代理商： | XRT73L02MIV |
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xr
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02M
REV. 1.0.0
5
30
TxClkINV/
SClk
I
Hardware Mode: Transmit Clock Invert
Host Mode: Serial Clock Input:
Function of this pin depends on whether the XRT73L02M is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” configures all the Transmitters to
sample the TPOS_n and TNEG_n data on the rising edge of the TxClk_n .
N
OTES
:
1. If the XRT73L02M is configured in HOST mode, this pin functions as
SClk input pin (please refer to the pin description for Microprocessor
interface).
82
TxMON
I
Transmitter Monitor:
When this pin is pulled “High”, MTIP and MRING are connected internally to
TTIP and TRING and allows self monitoring of the transmitter.
74
52
TxLEV_0
TxLEV_1
I
Transmit Line Build-Out Enable/Disable Select - Channel 0:
Transmit Line Build-Out Enable/Disable Select - Channel 1:
These input pins select the Transmit Line Build-Out circuit.
Setting these pins to "High" disables the Line Build-Out circuit of Channel n. In
this mode, Channel n outputs partially-shaped pulses onto the line via the
TTIP_n and TRing_n output pins.
Setting these pins to "Low" enables the Line Build-Out circuit of Channel n. In
this mode, Channel n outputs shaped pulses onto the line via the TTIP_n and
TRing_n output pins.
To comply with the Isolated DSX-3/STSX-1 Pulse Template Requirements per
Bellcore GR-499-CORE or Bellcore GR-253-CORE:
1. Set these pins to "1" if the cable length between the Cross-Connect and the
transmit output of Channel is greater than 225 feet.
2. Set these pins to "0" if the cable length between the Cross-Connect and the
transmit output of Channel is less than 225 feet.
These pins are active only if the following two conditions are true:
a. The XRT73L02M is configured to operate in either the DS3 or SONET STS-1
Modes.
b. The XRT73L02M is configured to operate in the Hardware Mode.
N
OTES
:
1. These pins are internally pulled down.
2. If the XRT73L02M is configured in HOST mode, these pins should be
tied to GND.
TRANSMIT INTERFACE
P
IN
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73L02 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
| XRT73L03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03AIV | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03B | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03BIV | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L02MIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73L02MIVTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT |
| XRT73L03A | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03AIV | 制造商:Exar Corporation 功能描述: |
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