參數(shù)資料
型號: XRT73L02MIV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP-100
文件頁數(shù): 11/46頁
文件大?。?/td> 391K
代理商: XRT73L02MIV
xr
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02M
REV. 1.0.0
9
CONTROL AND ALARM INTERFACE
P
IN
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
73
53
MRING_0
MRING_1
I
Monitor Ring Input - Channel 0:
Monitor Ring Input - Channel 1:
The bipolar line output signal from TRING_n is connected to this pin via a 270
resistor to check for line driver failure.
N
OTE
:
This pin is internally pulled "High".
72
54
MTIP_0
MTIP_1
I
Monitor Tip Input - Channel 0:
Monitor Tip Input - Channel 1:
The bipolar line output signal from TTIP_n is connected to this pin via a
270-
ohm resistor to check for line driver failure.
N
OTE
:
This pin is internally pulled "High".
79
47
DMO_0
DMO_1
O
Drive Monitor Output - Channel 0:
Drive Monitor Output - Channel 1:
If MTIP_n and MRING_n has no transition pulse for 128 ± 32 TxCLK_n cycles,
DMO_n goes “High” to indicate the driver failure. DMO_n output stays “High”
until the next AMI signal is detected.
94
33
RLOS_0
RLOS_1
O
Receive Loss of Signal Output Indicator - Channel 0:
Receive Loss of Signal Output Indicator - Channel 1:
This output pin toggles "High" if the receiver has detected a Loss of Signal Con-
dition.
The criteria for declaring /clearing an LOS Condition depends upon whether it is
operating in the E3 or STS-1/DS3 Mode.
95
32
RLOL_0
RLOL_1
O
Receive Loss of Lock Output Indicator - Channel 0:
Receive Loss of Lock Output Indicator - Channel 1:
This output pin toggles "High" if a Loss of Lock Condition is detected. LOL
(Loss of Lock) condition occurs if the recovered clock frequency deviates from
the Reference Clock frequency (available at either E3CLK or DS3CLK or STS-
1CLK input pins) by more than 0.5%.
11
RXA
****
External Resistor of 3 K
± 1%.
Should be connected between RxA and RxB for internal bias.
12
RXB
****
External Resistor of 3K
±1%.
Should be connected between RxA and RxB for internal bias.
98
ICT
I
In-Circuit Test Input:
Setting this pin "Low" causes all digital and analog outputs to go into a high-
impedance state to allow for in-circuit testing. For normal operation, tie this pin
"High".
N
OTE
:
This pin is internally pulled “High".
96
TEST
****
Factory Test Pin
N
OTE
:
This pin must be connected to GND for normal operation.
相關PDF資料
PDF描述
XRT73L02 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
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