參數(shù)資料
型號: XRD54L10AIDTR-F
廠商: Exar Corporation
文件頁數(shù): 2/16頁
文件大?。?/td> 0K
描述: IC DAC 10BIT SRL LP 8SOIC
標準包裝: 2,500
設(shè)置時間: 13µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 155mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
輸出數(shù)目和類型: *
采樣率(每秒): *
XRD54L08/L10/L12
10
Rev. 1.30
operating from a 3V supply versus 5V for the MA515 and
MAX539. The DOUT port also has 4mA driving capability
for greater fan-out when daisy-chaning to other digital
inputs.
Monotonicity
The XRD54L08/L10/L12 family of DACs are monotonic
over the entire temperature range.
Micro-Power Operation
The XRD54L08/L10/L12 are the lowest power DACs in
their class. The quiescent current rating does not include
the reference ladder current. Power can be saved when
the part is not in use by setting the DAC code to all “0”s
assuming the output load is referenced to ground. This
minimizes the DAC output load current. An analog switch
placed in series with the reference ladder can toggle the
reference voltage off when the circuit is inactive to
minimize power consumption.
Power Supply and Grounding
Best parametric results are obtained by powering the
XRD54L08/L10/L12 family of DACs from an analog +3V
power supply and analog ground. Digital power supplies
and grounds should be separated or connected to the
analog supplies and grounds only at the low-impedance
power-supply source. This is best accomplished on a
multilayer PCB with dedicated planes to ground and
power. The DACs should be locally bypassed with both
0.1 F and 2.2 F capacitors mounted as close as possible
to the power supply pin (VDD). Surface mount ceramic
capacitors are recommended for low impedance, wide
band power supply bypass. If only one +3V power supply
is available for both analog and digital circuity isolate the
analog power supply to the XRD54L08/L10/L12 DAC with
an inductor or ferrite bead before the local bypass
capacitors.
PERFORMANCE CHARACTERISTICS
Figure 8. XRD54L08 INL (For XRD54L10 and XRD54L12, Scale Axes Accordingly)
Figure 9. XRD54L08 DNL (For XRD54L10 and XRD54L12, Scale Axes Accordingly)
--0.20
--0.12
--0.04
0.04
CODE
L
S
B
64
128
0
192
255
--0.06
--0.02
0.02
0.06
0.10
CODE
L
S
B
128
64
192
255
0
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