參數(shù)資料
型號: XR88C92CVTR-F
廠商: Exar Corporation
文件頁數(shù): 16/32頁
文件大?。?/td> 0K
描述: IC UART FIFO DUAL 44LQFP
標準包裝: 1,000
特點: *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 2.97 V ~ 5.5 V
帶自動流量控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應商設(shè)備封裝: 44-LQFP(10x10)
包裝: 帶卷 (TR)
XR88C92/192
23
Rev. 1.33
PROGRAMMING EXAMPLES
The following examples show how to initialize the XR88C92/192 for various operating conditions:
A) The first example will initialize channel A of an XR88C92 device for regular RX/TX. The operating parameters will
be 9600 baud, 8 word length, no parity and 1 stop bit.
Operation Register
Value
Remarks
Write
CRA
0x20
; reset RX (receiver)
Write
CRA
0x30
; reset TX (transmitter)
Write
CRA
0x40
; reset error status
Write
CRA
0xB0
; reset MR pointer to MR0
Write
MR0A
0x00
; use normal baud rate table. Now MR pointer points to MR1
Write
MR1A
0x13
; select word length & parity. Now MR pointer points to MR2
Write
MR2A
0x07
; normal mode (not loopback) & 1 stop bit
Write
CSRA
0xBB
; 9600 baud for RX & TX - clock source is XTAL1
Write
CRA
0x05
; enable RX & TX
Read
SRA
; should get a value 0x0C
B) This example will show how to use hardware flow control for both RX (RTS via OP0) and TX (CTS via IP0):
Write
CRA
0x10
; reset MR pointer to MR1
Write
MR1A
0x93
; select auto RTS control. The -RTS signal is sent via output OP0
Write
MR2A
0x17
; select auto CTS control. The input IP0 serves as the -CTS signal
C) This example will configure clock sources for TX and RX of both channels and C/T. Specifically, XTAL1 will be
used as channel A's TX clock; IP4 as channel A's 16X RX clock; IP5 as channel B's 1X TX clock and XTAL1 as
channel B's RX clock. Also, the C/T will be initialized in the timer mode and IP2 will be used as its clock source.
Some of these will be programmed to appear at the multi-purpose output pins:
Write
ACR
0x40
; C/T initialized in timer mode & IP2 chosen as its clock source
; also, bit-7 = 0, therefore baud rate Set1 has been selected
Write
CTPU
0x00
; It is essential to program CTPU & CTPL before programming OP3
Write
CTPL
0x05
; as C/T output (see below)
Write
CSRA
0xEB
; channel A RX clock source: IP4-16X, TX clock source: XTAL1 (if MR0A
; bits 2 and 0 = 0, the TX baud rate is 9600)
Write
CSRB
0xBF
; channel B RX clock source: XTAL1 (9600 baud), TX clock source: IP5-1X
Read
STCR
; Start the C/T
Write
OPCR
0x06
; C/T output appears at OP3 and channel A's TX 1X clock (this is XTAL1
; clock divided by 16) at OP2.
D) The next example will show how to configure and run channel B's transmitter in a multi-drop application. Note that
all other relevant parameters should be configured already, like baud rate etc.
Write
CRB
0x10
; reset MR pointer to MR1
Write
MR1B
0x1B
; word length = 8 and use A/D tag in the place of parity
Write
CRB
0x04
; Enable transmitter of channel B
Write
TXB
address
; Send the address first (A/D tag = 1)
Write
CRB
0x10
; reset MR pointer to MR1
Write
MR1B
0x13
; change A/D tag = 0
Write
TXB
data
; You can load the data (A/D tag = 0) immediately after the address. There
; is no need to wait till the transmitter is empty. Load all the data.
Read
SRB
; Check to see if the transmitter is empty & ready. You need to do this
; before you can load the next address.
; Repeat the last 5 steps to load different addresses and their data.
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