參數(shù)資料
型號: XR19L212IL48-F
廠商: Exar Corporation
文件頁數(shù): 28/52頁
文件大?。?/td> 0K
描述: IC UART/TXRX RS232 48QFN
標(biāo)準(zhǔn)包裝: 260
特點: *
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232
電源電壓: 3.3 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN-EP(7x7)
包裝: 托盤
XR19L212
34
TWO CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER
REV. 1.0.1
MSR[5]: DSR Input Status
The DSR pins are not available for L212 as inputs. In the loopback mode, this bit is equivalent to the DTR# bit
in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is not
used.
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. It is not available for L212 as an input. In the loopback
mode this bit is equivalent to bit-2 in the MCR register. The RI# input may be used as a general purpose input
when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. It is not available for L212 as an input. In the loopback
mode this bit is equivalent to bit-3 in the MCR register. The CD# input may be used as a general purpose input
when the modem interface is not used.
4.10
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
4.11
Enhanced Mode Select Register (EMSR)
This register replaces SPR (during a Write) and is accessible only when FCTR[6] = 1.
EMSR[1:0]: Receive/Transmit FIFO Level Count (Write-Only)
When Scratchpad Swap (FCTR[6]) is asserted, EMSR bits 1-0 controls what mode the FIFO Level Counter is
operating in.
During Alternate RX/TX FIFO Level Counter Mode, the first value read after EMSR bits 1-0 have been
asserted will always be the RX FIFO Level Counter. The second value read will correspond with the TX FIFO
Level Counter. The next value will be the RX FIFO Level Counter again, then the TX FIFO Level Counter and
so on and so forth.
EMSR[3:2]: Reserved
TABLE 12: SCRATCHPAD SWAP SELECTION
FCTR[6] EMSR[1]
EMSR[0] Scratchpad is
0
X
Scratchpad
1
X
0
RX FIFO Level Counter Mode
1
0
1
TX FIFO Level Counter Mode
1
Alternate RX/TX FIFO Counter Mode
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