參數(shù)資料
型號: XR17D154
廠商: Exar Corporation
英文描述: UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
中文描述: 通用(3.3V和5V)PCI總線四的UART
文件頁數(shù): 7/69頁
文件大?。?/td> 836K
代理商: XR17D154
xr
XR17D154
REV. 1.2.0
UNIVERSAL (3.3V AND 5V) PCI BUS QUAD UART
15
2.2.1
The Interrupt Status Register
The XR17D154 has a 32-bit wide register [INT0, INT1, INT2 and INT3] to provide interrupt information and
supports two interrupt schemes. The first scheme uses bits 0 to 3 of an 8-bit indicator (INT0) representing
channels 0 to 3 of the XR17D154, respectively. This permits the interrupt routine to quickly vector and serve
that UART channel and determine the source(s) in each individual routines. INT0 bit-0 represents the interrupt
status for UART channel 0 when its transmitter, receiver, line status, or modem port status requires service.
Other bits in the INT0 register provide indication for the other channels with bit-3 representing UART channel 4
respectively, bits 4 to 7 are reserved and remain at logic zero.
The second scheme provides detail about the source of the interrupts for each UART channel. All the
interrupts are encoded into a 3-bit code. This 3-bit code represents 7 interrupts corresponding to individual
UART’s transmitter, receiver, line status, modem port status. INT1 and INT2 registers provide the 12-bit
interrupt status for all 4 channels. Bits 8, 9 and 10 representing channel 0 and bits 17,18 and 19 representing
channel 3 respectively. Bits 20 to 31 are reserved and remain at logic zero. All 4 channel interrupts status are
available with a single DWORD read operation. This feature allows the host quickly vectors and serves the
interrupts, reducing service interval, hence, reduce host bandwidth requirement. Figure 6 shows the 4-byte
interrupt register and its make up.
A special interrupt condition is generated by the 154 when it wakes up from sleep mode. This special interrupt
is cleared by reading the INT0 register. If there are not any other interrupts pending, the value read from INT0
would be 0x00.
INT0 [7:0] Channel Interrupt Indicator
Each bit gives an indication of the channel that has requested for service. Bit-0 represents channel 0 and bit-3
indicates channel 3. Logic 1 indicates that a channel has called for service. Bits 4 to 7 are reserved and remain
at logic 0 The interrupt bit clears after reading the appropriate register of the interrupting channel register, see
Interrupt Clearing section.
GLOBAL INTERRUPT REGISTER (DWORD) - [default 0x00-00-00-00]
INT3 [31:24]
INT2 [23:16]
INT1 [15:8]
INT0 [7:0]
INT0 register provides status for each channel
IN T0 R eg ister
Individual U A R T C hannel In te rrupt S tatus
Rs vd
Ch -3 Ch -2 Ch -1 Ch -0
B it-7 B it-6
B it-5
B it-4
B it-3
B it-2
B it-1
B it-0
Rs vd Rs vd Rs vd
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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XR17D154CV-0A-EVB 功能描述:界面開發(fā)工具 Supports D154 144 ld TQFP, PCI Interface RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
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XR17D154CVTR-F 制造商:Exar Corporation 功能描述:UART 4-CH 64Byte FIFO 3.3V/5V 144-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR17D154CVTR-F
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