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參數(shù)資料
| 型號： | XR16V564IV80-0A-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 34/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR16V564 80LQFP |
| 標準包裝： | 1 |
| 系列： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
ORDERING INFORMATION
PART NUMBER
PACKAGE
OPERATING TEMPERATURE
RANGE
DEVICE STATUS
XR16V564IJ
68-Lead PLCC
-40°C to +85°C
Active
XR16V564IV
64-Lead LQFP
-40°C to +85°C
Active
XR16V564DIV
64-Lead LQFP
-40°C to +85°C
Active
XR16V564IL
48-pin QFN
-40°C to +85°C
Active
XR16V564IV80
80-Lead LQFP
-40°C to +85°C
Active
XR16V564/564D
4
2.25V TO 3.6V QUAD UART WITH 32-BYTE FIFO
REV. 1.0.4
PIN DESCRIPTIONS
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN #
80-LQFP
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
15
16
17
22
23
24
32
33
34
46
47
48
I
Address data lines [2:0]. These 3 address lines select
one of the internal registers in UART channel A-D dur-
ing a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
46
45
44
43
42
41
40
39
60
59
58
57
56
55
54
53
5
4
3
2
1
68
67
66
15
14
13
12
11
9
8
7
I/O
Data bus lines [7:0] (bidirectional).
IOR#
(VCC)
29
40
52
70
I
When 16/68# pin is HIGH, the Intel bus interface is
selected and this input becomes read strobe (active
low). The falling edge instigates an internal read cycle
and retrieves the data byte from an internal register
pointed by the address lines [A2:A0], puts the data
byte on the data bus to allow the host processor to
read it on the rising edge.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input is not used and should be con-
nected to VCC.
IOW#
(R/W#)
7
9
18
31
I
When 16/68# pin is HIGH, it selects Intel bus interface
and this input becomes write strobe (active low). The
falling edge instigates the internal write cycle and the
rising edge transfers the data byte on the data bus to
an internal register pointed by the address lines.
When 16/68# pin is LOW, the Motorola bus interface is
selected and this input becomes read (logic 1) and
write (LOW) signal.
CSA#
(CS#)
5
7
16
28
I
When 16/68# pin is HIGH, this input is chip select A
(active low) to enable channel A in the device.
When 16/68# pin is LOW, this input becomes the chip
select (active low) for the Motorola bus interface.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR16V564IV80-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V564IV80TR-F | 制造商:Exar Corporation 功能描述:UART 4-CH 32Byte FIFO 2.5V/3.3V 80-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR16V564IV80TR-F |
| XR16V564IV-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16V564IVTR-F | 制造商:Exar Corporation 功能描述:UART 4-CH 32Byte FIFO 2.5V/3.3V 64-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR16V564IVTR-F |
| XR16V598 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 16-BYTE FIFO |
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