REV. 1.0.2 HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE PIN DESCRIPTIONS Pin Description N
參數(shù)資料
型號： XR16M2651IM48-F
廠商： Exar Corporation
文件頁數(shù)： 23/51頁
文件大?。?/td> 0K
描述： IC UART FIFO 32B DUAL 48TQFP
標準包裝： 250
特點： *
通道數(shù)： 2，DUART
FIFO's： 32 字節(jié)
規(guī)程： RS232，RS422
電源電壓： 1.62 V ~ 3.63 V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調制解調器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應商設備封裝： 48-TQFP（7x7）
包裝： 托盤
XR16M2651
3
REV. 1.0.2
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
PIN DESCRIPTIONS
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
18
19
20
26
27
28
I
Address data lines [2:0]. These 3 address lines select one of the internal registers
in UART channel A/B during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
2
1
32
31
30
29
28
27
3
2
1
48
47
46
45
44
I/O Data bus lines [7:0] (bidirectional).
IOR#
(VCC)
14
19
I
When 16/68# pin is HIGH, the Intel bus interface is selected and this input
becomes read strobe (active low). The falling edge instigates an internal read cycle
and retrieves the data byte from an internal register pointed by the address lines
[A2:A0], puts the data byte on the data bus to allow the host processor to read it on
the rising edge.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input is
not used and should be connected to VCC.
IOW#
(R/W#)
12
15
I
When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes write
strobe (active low). The falling edge instigates the internal write cycle and the rising
edge transfers the data byte on the data bus to an internal register pointed by the
address lines.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input
becomes read (HIGH) and write (LOW) signal.
CSA#
(CS#)
7
10
I
When 16/68# pin is HIGH, this input is chip select A (active low) to enable channel
A in the device.
When 16/68# pin is LOW, this input becomes the chip select (active low) for the
Motorola bus interface.
CSB#
(A3)
8
11
I
When 16/68# pin is HIGH, this input is chip select B (active low) to enable channel
B in the device.
When 16/68# pin is LOW, this input becomes address line A3 which is used for
channel selection in the Motorola bus interface. Input logic 0 selects channel A and
logic 1 selects channel B.
INTA
(IRQ#)
22
30
O
When 16/68# pin is HIGH for Intel bus interface, this output becomes channel A
interrupt output. The output state is defined by the user through the software set-
ting of MCR[3]. INTA is set to the active mode and OP2A# output to a logic 0 when
MCR[3] is set to a logic 1. INTA is set to the three state mode and OP2A# to a logic
1 when MCR[3] is set to a logic 0. See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this output becomes device
interrupt output (active low, open drain). An external pull-up resistor is required for
proper operation.
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