FIGURE 5. EXTERNAL C
參數(shù)資料
型號(hào)： XR16L580IMTR-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 3/49頁(yè)
文件大小： 0K
描述： IC UART FIFO 16B 48TQFP
標(biāo)準(zhǔn)包裝： 1,500
特點(diǎn)： *
通道數(shù)： 1，UART
FIFO's： 16 字節(jié)
規(guī)程： RS232，RS422
電源電壓： 2.25 V ~ 5.5 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 帶卷 (TR)
FIGURE 5. EXTERNAL CLOCK CONNECTION FOR EXTENDED DATA RATE
2K
XTA L 1
XTA L 2
R1
VC C
E x ternal C loc k
vcc
gnd
XR16L580
11
REV. 1.4.2
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
For further reading on the oscillator circuit please see the Application Note DAN108 on the EXAR web site at
2.9
Programmable Baud Rate Generator
The L580 UART has its own Baud Rate Generator (BRG) with a prescaler. The prescaler is controlled by a
software bit (bit-7) in the MCR register. This bit selects the prescaler to divide the input crystal or external clock
by a factor of 1 or 4. The clock output of the prescaler goes to the BRG. The BRG further divides this clock by
a programmable divisor (via DLL and DLM registers) between 1 and (216 -1) to obtain a 16X sampling rate
clock of the serial data rate. The sampling rate clock is used by the transmitter for data bit shifting and receiver
for data sampling. The BRG divisor defaults to the maximum baud rate (DLL = 0x01 and DLM = 0x00) upon
power up.
FIGURE 6. BAUD RATE GENERATOR AND PRESCALER
XTAL1
XTAL2
Crystal
Osc/
Buffer
MCR Bit-7=0
(default)
MCR Bit-7=1
DLL and DLM
Registers
Prescaler
Divide by 1
Prescaler
Divide by 4
16X
Sampling
Rate Clock to
Transmitter
Baud Rate
Generator
Logic
Programming the Baud Rate Generator Registers DLM and DLL provides the capability of selecting the
operating data rate.
Table 3 shows the standard data rates available with a 14.7456 MHz crystal or external
clock at 16X sampling rate clock rate. When using a non-standard data rate crystal or external clock, the
divisor value can be calculated for DLL/DLM with the following equation.
divisor (decimal) = (XTAL1 clock frequency / prescaler) / (serial data rate x 16)
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