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參數(shù)資料
| 型號： | XCV200-6FGG256I |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 1176 CLBS, 236666 GATES, 333 MHz, PBGA256 |
| 封裝： | FBGA-256 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大小： | 167K |
| 代理商： | XCV200-6FGG256I |
Virtex 2.5 V Field Programmable Gate Arrays
R
DS003-3 (v3.2) September 10, 2002
Module 3 of 4
Production Product Specification
1-800-255-7778
19
Virtex Pin-to-Pin Input Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted
Global Clock Set-Up and Hold for LVTTL Standard, with DLL
Description
Symbol
Device
Speed Grade
Units
Min
-6
-5
-4
Input Setup and Hold Time Relative to Global Clock Input Signal for LVTTL Standard. For data input with different
standards, adjust the setup time delay by the values shown in Input Delay Adjustments.
No Delay
Global Clock and IFF, with DLL
TPSDLL/TPHDLL
XCV50
0.40 / –0.4
1.7 /–0.4
1.8 /–0.4
2.1 /–0.4
ns,
min
XCV100
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV150
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV200
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV300
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV400
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV600
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV800
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
XCV1000
0.40 /–0.4
1.7 /–0.4
1.9 /–0.4
2.1 /–0.4
ns,
min
IFF = Input Flip-Flop or Latch
Notes:
1.
Set-up time is measured relative to the Global Clock input signal with the fastest route and the lightest load. Hold time is measured
relative to the Global Clock input signal with the slowest route and heaviest load.
2.
DLL output jitter is already included in the timing calculation.
3.
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but
if a "0" is listed, there is no positive hold time.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XCV200-6PQ240C | 功能描述:IC FPGA 2.5V C-TEMP 240-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 標準包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應商設備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XCV200-6PQ240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays |
| XCV200-6PQG240C | 制造商:Xilinx 功能描述:FPGA VIRTEX 236.666K GATES 5292 CELLS 333MHZ 0.22UM 2.5V 240 - Trays |
| XCV200E | 制造商:XILINX 制造商全稱:XILINX 功能描述:Field Programmable Gate Arrays |
| XCV200E-6BG240C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex⑩-E 1.8 V Field Programmable Gate Arrays |
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