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| 型號(hào)： | XCR3384XLSERIES |
| 英文描述： | 384 Macrocell CPLD |
| 中文描述： | 384宏單元CPLD |
| 文件頁(yè)數(shù)： | 42/43頁(yè) |
| 文件大小： | 396K |
| 代理商： | XCR3384XLSERIES |
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hdc
149
O
High During Configuration (hdc)
is output high when the XCR3320 is in the
configuration state. hdc is used as a control output indicating that configuration is in
progress. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
“
Terminations
”
on page 8
for more information.
Low During Configuration (ldcn)
is output low when the XCR3320 is in the
configuration state. ldcnis used as a control output indicating that configuration is in
progress. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
“
Terminations
”
on page 8
for more information.
crcerrn
goes Low when the XCR3320 detects a CRC error or an invalid peramble
during configuration. The XCR3320 that detected the error will go into the initialization
state and will not resume configuration until prgmn and resetn are both High. Once
configuration has resumed crcerrn will go High. During configuration, an internal
pull-up is enabled. If only one device is used, this pin can be left floating. If multiple
devices are daisy chained, an external pull-up should be used. After configuration,
the pin is a user-programmable I/O, and no external termination is required. See
“
Terminations
”
on page 8
for more information.
Global 3-state
is an active-high dedicated input used to 3-state the I/Os and activate
the internal pull-down resistors. If this feature is not used, the pin should be pulled
Low.
cs0n/cs1/wrn
are used in the peripheral configuration mode. The XCR3320 is
selected when cs0n and wrn are Low and cs1 is High. After configuration, these pins
are user-programmable I/O. cs0N and wrn require no external termination. See
“
Terminations
”
on page 8
for more information. If cs1 is not used as an I/O after
configuration in synchronous peripheral mode, the 3-state property should be used
to disable the internal pull-down resistor. See
“
Synchronous Peripheral Mode
”
on
page 19
for more information.
In the master parallel configuration mode,
A[19:0]
address the configuration
EEPROM. After configuration, the pin is a user-programmable I/O, and no external
termination is required. See
“
Terminations
”
on page 8
for more information.
ldcn
58
O
crcerrn
136
I/O
gts
22
I
cs0n
cs1
wrn
123
78
138
I
A[19:0]
26, 28, 30, 34,
36, 93, 39, 48,
50, 52, 54, 65,
67, 69, 72, 74,
82, 85, 87, 91
13, 155, 11, 1,
9, 7, 3, 5
O
D[7:0]
I
During master parallel, peripheral, and slave parallel configuration modes,
D[7:0]
receive configuration data. After configuration, the pin is a user-programmable I/O,
and no external termination is required. See
“
Terminations
”
on page 8
for more
information.
During configuration,
dout
is the serial data out that is used to drive the din of
daisy-chained slave devices. Data on dout changes on the falling edge of cclk.
After configuration, the pin is a user-programmable I/O, and no external termination
is required. See
“
Terminations
”
on page 8
for more information.
dout
120
O
Table 18: Pin Function Description (Continued)
Symbol
Pin Number
Type
Description
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