
R
XCR3320: 320 Macrocell SRAM CPLD
33
DS033 (v1.1) February 10, 2000AC Electrical Characteristics For Industrial Grade Devices
Industrial temperature range: V
CC
= 3.0V to 3.6V; -40
°
C < T
AMB
< 85
°
C
Symbol
Parameter
N8
Unit
Min.
Max.
Timing Requirements
t
CL
t
CH
t
SU_PAL
t
SU_PLA
t
SU_XOR
t
H
Output Characteristics
t
PD_PAL
t
PD_PLA
t
PD_XOR
t
PDF_PAL
Clock LOW time
Clock HIGH time
PAL setup time (Global clock)
PLA setup time (Global clock)
XOR setup time (Global clock)
Hold time (Global clock)
2.5
2.5
3.5
5.0
6.0
ns
ns
ns
ns
ns
ns
0
Input to output delay through PAL
Input to output delay through PLA
Input to output delay through XOR
Input (or feedback node) to internal feedback node
delay time through PAL
Input (or feedback node) to internal feedback node
delay time through PLA
Input (or feedback node) to internal feedback node
delay time through XOR
Global clock to feedback delay
Global clock to out delay
Clock skew (variance for switching outputs with
common global clock)
Maximum flip-flop toggle rate:
8.5
10
11
5.0
ns
ns
ns
ns
t
PDF_PLA
6.5
ns
t
PDF_XOR
7.5
ns
t
CF
t
CO
t
CS
3.5
7.0
1.0
ns
ns
ns
f
MAX1
200
MHz
f
MAX2
Maximum internal frequency:
143
MHz
f
MAX3
Maximum external frequency:
95
MHz
t
BUFF
t
SSR
t
EA
t
ER
t
GTSA
t
GTSR
t
RR
t
RP
t
GRR
t
GZIA
Note
:
Output buffer delay (fast)
Slow slew rate incremental delay
Output enable delay
Output disable delay
1
Global 3-state enable
Global 3-state disable
Input to register reset
Input to register preset
Global reset to register reset
Global ZIA delay
3.5
5.5
11.0
11.0
11.0
11.0
11.5
10.0
11
2.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1. Output C
L
= 5.0 pF.
+
t
CL
t
CH
-------1
t
SU
PAL
–
t
CF
+
------------1
t
SU
PAL
–
t
CO
+
------------1
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