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參數(shù)資料
| 型號(hào)： | XCCACEM16SERIES |
| 英文描述： | System ACE MPM Solution |
| 中文描述： | 系統(tǒng)ACE MPM的解決方案 |
| 文件頁(yè)數(shù)： | 5/29頁(yè) |
| 文件大?。?/td> | 285K |
| 代理商： | XCCACEM16SERIES |
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Target FPGA Configuration Pins
Table 3
provides target FPGA configuration pins.
Table 2:
IEEE 1149.1 Boundary Scan Pins
Pin Name
Pin Type
Description
TCK
Input
IEEE 1149.1 test clock pin. The System ACE MPM TCK pin is connected to the
XCV50E and XC18V01 TCK pins. By default, the XCV50E has an internal
pull-up resistor on its TCK pin.
TMS
Input
IEEE 1149.1 test mode select pin. The System ACE MPM TMS pin is
connected to the XCV50E and XC18V01 TMS pins which have internal pull-up
resistors.
TDI
Input
IEEE 1149.1 test data input pin. The System ACE MPM TDI is connected to
the XC18V01 TDI pin which has an internal pull-up resistor.
TDO
Output
IEEE 1149.1 test data output pin. The System ACE MPM TDO pin is connected
to the XCV50E TDO pin which by default has an internal pull-up resistor.
Table 3:
Target FPGA Configuration Pins
Pin Name
Pin Type
Description
CFG_DATA[0]
Output
For Slave-Serial configuration mode, CFG_DATA[0] is the serial data signal for
Serial-Slave Chain 0 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 0. For Slave-SelectMAP configuration mode, CFG_DATA[0]
is the data bit 0 on the SelectMAP bus and is connected to D0 on all target
FPGAs.
CFG_DATA[1]
Output
For Slave-Serial configuration mode, CFG_DATA[1] is the serial data signal for
Serial-Slave Chain 1 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 1. For Slave-SelectMAP configuration mode, CFG_DATA[1]
is the data bit 1 on the SelectMAP bus and is connected to D1 on all target
FPGAs.
CFG_DATA[2]
Output
For Slave-Serial configuration mode, CFG_DATA[2] is the serial data signal for
Serial-Slave Chain 2 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 2. For Slave-SelectMAP configuration mode, CFG_DATA[2]
is the data bit 2 on the SelectMAP bus and is connected to D2 on all target
FPGAs.
CFG_DATA[3]
Output
For Slave-Serial configuration mode, CFG_DATA[3] is the serial data signal for
Serial-Slave Chain 3 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 3. For Slave-SelectMAP configuration mode, CFG_DATA[3]
is the data bit 3 on the SelectMAP bus and is connected to D3 on all target
FPGAs.
CFG_DATA[4]
Output
For Slave-Serial configuration mode, CFG_DATA[4] is the serial data signal for
Serial-Slave Chain 4 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 4. For Slave-SelectMAP configuration mode, CFG_DATA[4]
is the data bit 4 on the SelectMAP bus and is connected to D4 on all target
FPGAs.
CFG_DATA[5]
Output
For Slave-Serial configuration mode, CFG_DATA[5] is the serial data signal for
Serial-Slave Chain 5 and is connected to DIN of the first FPGA in the
Slave-Serial Chain 5. For Slave-SelectMAP configuration mode, CFG_DATA[5]
is the data bit 5 on the SelectMAP bus and is connected to D5 on all target
FPGAs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XCCACEM32BG388I | 制造商:XILINX 制造商全稱:XILINX 功能描述:System ACE MPM Solution |
| XCCACEM32-BG388I | 功能描述:SYS ACE MULTIPKG MODULE 32MBIT RoHS:否 類別:存儲(chǔ)卡，模塊 >> 存儲(chǔ)器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
| XCCACEM32SERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:System ACE MPM Solution |
| XCCACEM64BG388I | 制造商:XILINX 制造商全稱:XILINX 功能描述:System ACE MPM Solution |
| XCCACEM64-BG388I | 功能描述:SYS ACE MULTIPKG MODULE 64MBIT RoHS:否 類別:存儲(chǔ)卡，模塊 >> 存儲(chǔ)器 - 模塊 系列:- 標(biāo)準(zhǔn)包裝:100 系列:- 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:1GB 速度:133MHz 特點(diǎn):- 封裝/外殼:168-DIMM |
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