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| 型號(hào)： | XC95144XLSERIES |
| 英文描述： | High Performance CPLD |
| 中文描述： | 高性能的CPLD |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | XC95144XLSERIES |
November 13, 1998 (Version 1.2)
5
Internal Timing Parameters
Symbol
Parameter
XC95144XL-5
Min
1
XC95144XL-7
Min
XC95144XL-10
Min
Units
Max
1
Max
Max
Buffer Delays
t
IN
t
GCK
t
GSR
t
GTS
t
OUT
t
EN
Product Term Control Delays
t
PTCK
Product term clock delay
t
PTSR
Product term set/reset delay
t
PTTS
Product term 3-state delay
Internal Register and Combinatorial Delays
t
PDI
Combinatorial logic propagation delay
t
SUI
Register setup time
t
HI
Register hold time
t
ECSU
Register clock enable setup time
t
ECHO
Register clock enable hold time
t
COI
Register clock to output valid time
t
AOI
Register async. S/R to output delay
t
RAI
Register async. S/R recover before clock
t
LOGI
Internal logic delay
t
LOGILP
Internal low power logic delay
Feedback Delays
t
F
FastCONNECT II feedback delay
Time Adders
t
PTA
Incremental product term allocator delay
t
SLEW
Slew-rate limited delay
Input buffer delay
GCK buffer delay
GSR buffer delay
GTS buffer delay
Output buffer delay
Output buffer enable/disable delay
1.5
1.1
2.0
4.0
2.0
0.0
2.3
1.5
3.1
5.0
2.5
0.0
3.5
1.8
4.5
7.0
3.0
0.0
ns
ns
ns
ns
ns
ns
1.6
1.0
5.5
2.4
1.4
7.2
2.7
1.8
7.5
ns
ns
ns
0.5
1.3
1.7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2.3
1.4
2.3
1.4
2.6
2.2
2.6
2.2
3.0
3.5
3.0
3.5
0.4
6.0
0.5
6.4
1.0
7.0
5.0
7.5
10.0
1.0
5.0
1.4
6.4
1.8
7.3
1.9
3.5
4.2
ns
0.7
3.0
0.8
4.0
Preliminary
1.0
4.5
ns
ns
Advance
Note 1:
Please contact Xilinx for up-to-date information on advance specifications.
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相關(guān)代理商/技術(shù)參數(shù) |
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| XC95144XLTQ11C | 制造商:XILINX 功能描述:NEW |
| XC95144XV | 制造商:XILINX 制造商全稱:XILINX 功能描述:High-Performance CPLD |
| XC95144XV_07 | 制造商:XILINX 制造商全稱:XILINX 功能描述:High-Performance CPLD |
| XC95144XV-4CS144C | 制造商:XILINX 制造商全稱:XILINX 功能描述:High-Performance CPLD |
| XC95144XV-4CS144I | 制造商:XILINX 制造商全稱:XILINX 功能描述:High-Performance CPLD |
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