- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4224 > XC5VLX50T-1FF1136C (Xilinx Inc)IC FPGA VIRTEX-5 50K 1136FBGA PDF資料下載
參數(shù)資料
| 型號： | XC5VLX50T-1FF1136C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 5/91頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA VIRTEX-5 50K 1136FBGA |
| 產(chǎn)品變化通告： | Step Intro and Pkg Change 11/March/2008 |
| 標準包裝： | 1 |
| 系列： | Virtex®-5 LXT |
| LAB/CLB數(shù)： | 3600 |
| 邏輯元件/單元數(shù)： | 46080 |
| RAM 位總計： | 2211840 |
| 輸入/輸出數(shù)： | 480 |
| 電源電壓： | 0.95 V ~ 1.05 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 1136-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 1136-FCBGA |
| 配用： | 568-5088-ND - BOARD DEMO DAC1408D750 122-1586-ND - BOARD EVAL FOR VIRTEX-5 ML555 HW-V5-ML561-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-V5-ML550-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-V5-ML521-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-AFX-FF1136-500-G-ND - BOARD DEV VIRTEX 5 FF1136 HW-V5GBE-DK-UNI-G-ND - KIT DEV V5 LXT GIGABIT ETHERNET 122-1508-ND - EVALUATION PLATFORM VIRTEX-5 |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
13
GTP_DUAL Tile Specifications
GTP_DUAL Tile DC Characteristics
Table 24: Absolute Maximum Ratings for GTP_DUAL Tiles
Symbol
Description
Units
MGTAVCCPLL
Analog supply voltage for the GTP_DUAL shared PLL relative to GND
–0.5 to 1.32
V
MGTAVTTTX
Analog supply voltage for the GTP_DUAL transmitters relative to GND
–0.5 to 1.32
V
MGTAVTTRX
Analog supply voltage for the GTP_DUAL receivers relative to GND
–0.5 to 1.32
V
MGTAVCC
Analog supply voltage for the GTP_DUAL common circuits relative to GND
–0.5 to 1.1
V
MGTAVTTRXC
Analog supply voltage for the resistor calibration circuit of the GTP_DUAL
column
–0.5 to 1.32
V
Notes:
1.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
Table 25: Recommended Operating Conditions for GTP_DUAL Tiles(1)(2)
Symbol
Description
Min
Max
Units
MGTAVCCPLL(1)
Analog supply voltage for the GTP_DUAL shared PLL relative to GND
1.14
1.26
V
MGTAVTTTX(1)
Analog supply voltage for the GTP_DUAL transmitters relative to GND
1.14
1.26
V
MGTAVTTRX(1)
Analog supply voltage for the GTP_DUAL receivers relative to GND
1.14
1.26
V
MGTAVCC(1)
Analog supply voltage for the GTP_DUAL common circuits relative to GND
0.95
1.05
V
MGTAVTTRXC(1) Analog supply voltage for the resistor calibration circuit of the GTP_DUAL
column
1.14
1.26
V
Notes:
1.
Each voltage listed requires the filter circuit described in UG196: Virtex-5 FPGA RocketIO GTP Transceiver User Guide.
2.
Voltages are specified for the temperature range of TJ = –40°C to +100°C.
Table 26: DC Characteristics Over Recommended Operating Conditions for GTP_DUAL Tiles(1)
Symbol
Description
Min
Typ
Max
Units
IMGTAVTTTX
GTP_DUAL tile transmitter termination supply current(2)
71
90
mA
IMGTAVCCPLL
GTP_DUAL tile shared PLL supply current
36
60
mA
IMGTAVTTRXC
GTP_DUAL tile resistor termination calibration supply current
0.1
0.5
mA
IMGTAVTTRX
GTP_DUAL tile receiver termination supply current(3)
0.1
0.5
mA
IMGTAVCC
GTP_DUAL tile internal analog supply current
56
110
mA
MGTRREF
Precision reference resistor for internal calibration termination
49.9 ± 1% tolerance
Ω
Notes:
1.
Typical values are specified at nominal voltage, 25°C, with a 3.2 Gb/s line rate.
2.
ICC numbers are given per GTP_DUAL tile with both GTP transceivers operating with default settings.
3.
AC coupled TX/RX link.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC5VLX50T-1FFG1136C | IC FPGA VIRTEX-5 50K 1136FBGA |
| AT24C02C-XHM-T | IC EEPROM 2KBIT 1MHZ 8TSSOP |
| XC2V1500-4FF896I | IC FPGA VIRTEX-II 896FCBGA |
| AT24C02C-STUM-T | IC EEPROM 2KBIT 1MHZ SOT23-5 |
| XC2V1500-5FFG896C | IC FPGA VIRTEX-II 1.5M 896-FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC5VLX50T-1FF1136CES | 制造商:Xilinx 功能描述: |
| XC5VLX50T-1FF1136I | 功能描述:IC FPGA VIRTEX-5 50K 1136FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX50T-1FF1138CES | 制造商:Xilinx 功能描述: |
| XC5VLX50T-1FF665C | 功能描述:IC FPGA VIRTEX-5 50K 665FCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX50T-1FF665CES | 制造商:Xilinx 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。