參數(shù)資料
型號: XC2S200-5FGG456C
廠商: Xilinx Inc
文件頁數(shù): 42/99頁
文件大?。?/td> 0K
描述: IC SPARTAN-II FPGA 200K 456-FBGA
標準包裝: 60
系列: Spartan®-II
LAB/CLB數(shù): 1176
邏輯元件/單元數(shù): 5292
RAM 位總計: 57344
輸入/輸出數(shù): 284
門數(shù): 200000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應商設備封裝: 456-FBGA
其它名稱: 122-1312
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
47
R
SSTL2_I
A sample circuit illustrating a valid termination technique for
SSTL2_I appears in Figure 49. DC voltage specifications
appear in Table 27 for the SSTL2_I standard. See "DC
Specifications" in Module 3 for the actual FPGA
characteristics
SSTL2 Class II
A sample circuit illustrating a valid termination technique for
SSTL2_II appears in Figure 50. DC voltage specifications
appear in Table 28 for the SSTL2_II standard. See "DC
Specifications" in Module 3 for the actual FPGA
characteristics.
Figure 49: Terminated SSTL2 Class I
Table 27: SSTL2_I Voltage Specifications
Parameter
Min
Typ
Max
VCCO
2.3
2.5
2.7
VREF = 0.5 × VCCO
1.15
1.25
1.35
VTT = VREF + N(1)
1.11
1.25
1.39
VIH ≥ VREF + 0.18
1.33
1.43
3.0(2)
VIL ≤ VREF – 0.18
–0.3(3)
1.07
1.17
VOH ≥ VREF + 0.61
1.76
-
VOL ≤ VREF – 0.61
-
0.74
IOH at VOH (mA)
–7.6
-
IOL at VOL (mA)
7.6
-
Notes:
1.
N must be greater than or equal to –0.04 and less than or
equal to 0.04.
2.
VIH maximum is VCCO + 0.3.
3.
VIL minimum does not conform to the formula.
VREF = 1.25V
VCCO = 2.5V
50
Ω
Z = 50
SSTL2 Class I
DS001_49_061200
VTT = 1.25V
25
Ω
Figure 50: Terminated SSTL2 Class II
Table 28: SSTL2_II Voltage Specifications
Parameter
Min
Typ
Max
VCCO
2.3
2.5
2.7
VREF = 0.5 × VCCO
1.15
1.25
1.35
VTT = VREF + N(1)
1.11
1.25
1.39
VIH ≥ VREF + 0.18
1.33
1.43
3.0(2)
VIL ≤ VREF – 0.18
–0.3(3)
1.07
1.17
VOH ≥ VREF + 0.8
1.95
-
VOL ≤ VREF - 0.8
-
0.55
IOH at VOH (mA)
–15.2
-
IOL at VOL (mA)
15.2
-
Notes:
1.
N must be greater than or equal to –0.04 and less than or
equal to 0.04.
2.
VIH maximum is VCCO + 0.3.
3.
VIL minimum does not conform to the formula.
VREF = 1.25V
VCCO = 2.5V
50
Ω
Z = 50
SSTL2 Class II
DS001_50_061200
VTT = 1.25V
50
Ω
VTT = 1.25V
25
Ω
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相關代理商/技術參數(shù)
參數(shù)描述
XC2S200-5FGG456C4124 制造商:Xilinx 功能描述:
XC2S200-5FGG456I 功能描述:IC SPARTAN-II FPGA 200K 456-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan®-II 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應商設備封裝:676-FBGA(27x27)
XC2S200-5PQ208C 功能描述:IC FPGA 2.5V 1176 CLB'S 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan®-II 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應商設備封裝:676-FBGA(27x27)
XC2S200-5PQ208I 功能描述:IC FPGA 2.5V I-TEMP 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan®-II 標準包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計:2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應商設備封裝:676-FBGA(27x27)
XC2S200-5PQ208Q 制造商:Xilinx 功能描述:XILINX XC2S200-5PQ208Q FPGA - Trays 制造商:Xilinx 功能描述:Xilinx XC2S200-5PQ208Q FPGA