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參數(shù)資料
| 型號： | XA3S1200E-4FTG256Q |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 2/37頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA SPARTAN3E 1200K 256FTBGA |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | Spartan®-3E XA |
| LAB/CLB數(shù)： | 8672 |
| 邏輯元件/單元數(shù)： | 19512 |
| RAM 位總計(jì)： | 516096 |
| 輸入/輸出數(shù)： | 190 |
| 門數(shù)： | 1200000 |
| 電源電壓： | 1.14 V ~ 1.26 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 256-LBGA |
| 供應(yīng)商設(shè)備封裝： | 256-FTBGA |
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DS635 (v2.0) September 9, 2009
Product Specification
10
R
ICCAUXQ
Quiescent VCCAUX
supply current
XA3S100E
13
22
mA
XA3S250E
26
43
mA
XA3S500E
34
63
mA
XA3S1200E
59
100
mA
XA3S1600E
86
150
mA
Notes:
1.
The numbers in this table are based on the conditions set forth in Table 6.
2.
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (TJ of 25°C at VCCINT = 1.2 V, VCCO = 3.3V, and
VCCAUX = 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum
voltage limits with VCCINT = 1.26V, VCCO = 3.465V, and VCCAUX = 2.625V. The FPGA is programmed with a “blank” configuration data file
(i.e., a design with no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional
elements), measured quiescent current levels may be different than the values in the table. For more accurate estimates for a specific
design, use the Xilinx XPower tools.
3.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3E XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.
4.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
Table 8: Quiescent Supply Current Characteristics (Continued)
Symbol
Description
Device
I-Grade Maximum
Q-Grade
Maximum
Units
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